Senior SoC Verification Engineer - Low-Power AI Edge

Ambiq Micro, Inc.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Ambiq seeks an experienced verification engineer to own DV tasks for complex SoC designs. You will write SystemVerilog/UVM test benches, develop test plans, and verify full-chip implementations with low-power techniques.

Collaborating with design, architecture and software teams, you will execute tests, create robust debugging strategies, and ensure high coverage. Strong C-based verification experience is valued.

Qualifications

• Experience in ARM M/RISC-V SoC verification with AMBA interconnects.
• Strong SystemVerilog/UVM testbench development and debugging.
• Proficiency in C/C++, Python, Verilog and scripting for automation.

Responsibilities

• Verify digital and mixed-signal designs, including SoCs with multiple CPUs.
• Develop test plans at block, sub-system and chip level.
• Execute full-chip and module-level verification with low-power techniques.
• Create scalable test benches using SystemVerilog/UVM.
• Develop test cases, stimuli, checkers to achieve high coverage.
• Automate randomized testing and score-boarding.
• Debug design/verification issues and perform root-cause analysis.
• Collaborate with design, architecture and software teams.

Skills

SystemVerilog/UVM

Arm M/RISC-V verification

AMBA AXI/AHB/APB

C/C++

Python

Verilog

Test bench design

Education

BSEE/MSEE

Job description

Ambiq seeks an experienced verification engineer to own DV tasks for complex SoC designs. You will write SystemVerilog/UVM test benches, develop test plans, and verify full-chip implementations with low-power techniques.

Collaborating with design, architecture and software teams, you will execute tests, create robust debugging strategies, and ensure high coverage. Strong C-based verification experience is valued.