Senior Digital Verification Engineer – AI Datacenter ICs

Analog Devices, Inc.; Singapore; On-site; SGD 120,000 - 190,000; Full time

Job summary

Analog Devices, Inc. in Singapore is seeking a Senior Digital Verification Engineer to join our team developing advanced Optical Control ICs for AI datacenter and cloud infrastructure applications.

You will own end-to-end verification from block to system level, collaborating with digital, analog/mixed-signal, firmware, and system teams. The role demands strong SystemVerilog and UVM expertise, experience with AXI/AHB/APB, and a track record in coverage-driven verification.

Qualifications

• BS/MS/PhD in EE, CE or related field.
• 3+ years of hands-on digital verification for complex SoC designs.
• Strong SystemVerilog and UVM expertise with testbench architecture.
• Proficient with AXI, AHB, APB verification.

Responsibilities

• Own block-, chip-, and system-level verification.
• Develop verification plans with test strategy, coverage, assertions, and closure criteria.
• Build and maintain UVM-based verification environments.
• Drive functional and code coverage analysis and closure.
• Debug complex functional and integration issues.
• Collaborate with digital design, analog/mixed-signal, firmware, and system teams.
• Support post-silicon validation and bring-up with evaluation and applications teams.

Skills

SystemVerilog

UVM

Testbench architecture

Functional coverage

Assertions

AMBA AXI/AHB/APB

Python scripting

C/C++

Education

B.S./M.S./Ph.D. in Electrical Engineering, Computer Engineering, or related fields

Tools

Python scripting

Perl scripting

Tcl scripting

Shell scripting

AMBA protocols AXI/AHB/APB

Job description

Analog Devices, Inc. in Singapore is seeking a Senior Digital Verification Engineer to join our team developing advanced Optical Control ICs for AI datacenter and cloud infrastructure applications.

You will own end-to-end verification from block to system level, collaborating with digital, analog/mixed-signal, firmware, and system teams. The role demands strong SystemVerilog and UVM expertise, experience with AXI/AHB/APB, and a track record in coverage-driven verification.