Senior NPI ATE Test Engineer

advanced micro devices (singapore) pte ltd

Singapore

On-site

SGD 90,000 - 140,000

Full time

7 days ago
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Job summary

Advanced Micro Devices (Singapore) Pte Ltd is seeking a Senior Engineer/MTS Product Development Engineer to lead NPI ATE test solutions for Data Center Graphics. The role involves driving test development to meet milestones, coordinating with design and product/test teams, and guiding pre- and post-silicon activities for efficient mass production.

The candidate will apply DFT principles, develop patterns, and optimize test time, yield, and cost while mentoring junior engineers and collaborating

Qualifications

  • Proficient understanding of DFT architecture for SOC products.
  • Strong test development and silicon characterization/debug experience.
  • Experience with industry-standard ATE platforms and data analysis.

Responsibilities

  • Drive test solution/coverage development and optimization to meet milestones, cost and quality.
  • Develop test patterns and test flows, debug, test and characterize.
  • Pre-Silicon engagement with design, scoping, planning and validation.
  • Post-Silicon bring-up of test patterns and optimization for mass production.
  • Characterization execution/analysis and debug of new silicon designs and processes.
  • Optimize test coverage/flows for quality, yield, cost and test time.
  • Conduct engineering evaluations to close production issues.

Skills

DFT architecture
Test development
Leadership
Problem-solving
C++
Java
Python
Windows & Linux
Team collaboration

Education

BS/MS Electrical Engineering or Computer Engineering

Tools

Advantest V93K
Advantest SMT8

Job description

Advanced Micro Devices (Singapore) Pte Ltd is seeking a Senior Engineer/MTS Product Development Engineer to lead NPI ATE test solutions for Data Center Graphics. The role involves driving test development to meet milestones, coordinating with design and product/test teams, and guiding pre- and post-silicon activities for efficient mass production.

The candidate will apply DFT principles, develop patterns, and optimize test time, yield, and cost while mentoring junior engineers and collaborating

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