Research Engineer / Senior Engineer Advanced Packaging & Process Integration

Wanco Manpower Pte Ltd; Singapore; On-site; SGD 90,000 - 120,000; Full time

Job summary

Wanco Manpower Pte Ltd is recruiting engineers for multiple opportunities in advanced semiconductor packaging and process integration. The role focuses on developing and optimizing process integration flows for fan-out wafer-level packaging, 2.5D/3D interconnects and heterogeneous integration.

You will work across lithography, deposition, plating, etching, CMP, RDL, bumping, thinning and bonding, while evaluating upstream/downstream interactions to boost yield and reliability.

Qualifications

• Bachelor's/Master's/PhD in a relevant engineering discipline.
• Experience in semiconductor process integration.
• Hands-on process development and troubleshooting experience.
• Familiarity with DOE and data analysis methods.
• Ability to work across technical teams and communicate findings clearly.

Responsibilities

• Develop and optimize process integration flows for advanced packaging technologies (FOWLP, 2.5D/3D, heterogeneous integration).
• Work across lithography, deposition, plating, etching, CMP, RDL, bumping, thinning and bonding modules.
• Assess interactions between upstream and downstream processes to improve integration and package performance.
• Plan and execute engineering experiments, short-loop evaluations and prototype builds.
• Investigate defects, yield losses and reliability issues with root-cause analysis.
• Collaborate with design, process, equipment, manufacturing and reliability teams to meet milestones.
• Document process flows and findings, supporting discussions with industry partners.

Skills

Process integration

Troubleshooting

DOE

Data analysis

Cross-functional teamwork

Education

Bachelor's/Master's/PhD in engineering

Job description

Job Highlights

• Develop next-generation advanced packaging and chiplet integration technologies

• Opportunities across FOWLP, 2.5D/3D integration and advanced bonding

• Work on R&D, prototype development and industry collaboration projects

We are recruiting engineers for multiple opportunities in advanced semiconductor packaging and process integration.

If you have experience connecting semiconductor process modules, developing integration flows, or resolving cross-process issues to improve yield and reliability, we would like to hear from you.

Key Responsibilities

• Develop and optimize process integration flows for advanced packaging technologies, including fan-out wafer-level packaging, 2.5D interposers, 3D stacking and heterogeneous integration.

• Work across relevant process modules such as lithography, deposition, plating, etching, CMP, RDL, bumping, wafer thinning and bonding.

• Assess interactions between upstream and downstream processes to improve integration compatibility and overall package performance.

• Plan and execute engineering experiments, short-loop evaluations and prototype builds.

• Investigate process defects, yield losses and reliability issues using structured root-cause analysis.

• Collaborate with design, process, equipment, manufacturing and reliability teams to deliver technical milestones.

• Document process flows, experimental findings and technical reports, and support discussions with industry partners.

Requirements

• Bachelor's, Master's or PhD in Electrical/Electronics Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, Physics or a related discipline.

• Relevant experience in semiconductor process integration, wafer fabrication, advanced packaging or package assembly development.

• Experience integrating multiple process steps, with an understanding of how individual modules affect downstream processes, yield or reliability.

• Hands-on process development, experimentation and troubleshooting skills.

• Familiarity with DOE, SPC, data analysis or failure-analysis methods.

• Ability to work across technical teams and communicate findings clearly.

Relevant Technical Backgrounds

Experience in one or more of the following areas would be valuable:

• FOWLP, fan-in/fan-out packaging or wafer-level packaging

• RDL, wafer bumping or Cu back-end integration

• TSV, interposers or 2.5D/3D integration

• Flip-chip, thermal compression, fusion or hybrid bonding

• Chip-to-wafer or wafer-to-wafer integration

• Assembly integration involving thinning, dicing, underfill or moulding

• NPI, prototype development, process transfer or manufacturing ramp-up

Candidates are not expected to have experience in every technology listed. Strong expertise in a relevant area, supported by cross-module integration experience, will be considered for suitable openings.