Principal/Staff Engineer Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering

Micron Technology, Inc; Singapore; On-site; SGD 120,000 - 160,000; Full time

Job summary

Micron Technology, Inc invites applications for Principal/Staff Engineer – Advanced Packaging Die Level Technology Engineering in Singapore. You will develop and deploy assembly processes for wafer‑level packaging and die stacking, collaborating across organizations to meet performance, cost, and schedule goals.

You will drive process development, evaluate new equipment, ensure quality and reliability, and support transitions from development to high‑volume manufacturing, while integrating

Qualifications

• B.S., M.S., Ph.D. (or equivalent) in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or related technical field.
• At least 2 years of semiconductor process development or equipment evaluation experience, preferably in wafer bonding, die stacking, and packaging.
• Proficiency in Python, R, SQL for statistical analysis, process modeling, and data analytics.
• Experience with Visual Basic for automation and tool integration.
• Familiarity with E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System) for equipment and process control.
• Strong data-analytics capabilities to support SPC, DOE, defect analysis, and dashboarding.
• Strong understanding of process flows, process interactions, and how process changes can affect yield, performance, and reliability.
• Tenacity to work effectively under timelines and limited resources.
• Consistent track record of solving problems and addressing root causes.

Responsibilities

• Develop and optimize assembly processes for advanced packaging technologies, including wafer‑level packaging and die stacking (Chip on Wafer, Chip to Wafer).
• Focus on improving product quality, driving yield improvements, reducing costs, and enhancing productivity.
• Establish and enhance process‑management projects to deliver technology‑node requirements.
• Evaluate and promote new equipment and materials to enhance process capabilities.
• Set up process parameters for a variety of semiconductor equipment.
• Plan for new equipment and materials.
• Ensure defense coverage through process, measurement, inspection, and testing.
• Establish correlations between defense mechanisms to identify improvement opportunities.
• Conduct continuous data analysis to establish advanced controls and identify improvement opportunities.
• Work closely with internal and external stakeholders to build and execute technology development strategies aligned with organizational and business objectives.
• Collaborate with teams such as Package Integration, Assembly Engineering, Front End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality to integrate manufacturing processes for optimal performance and quality control.
• Ensure smooth transition from new product development, qualification, small‑volume production to high‑volume production.
• Provide Process Of Record (POR) and Model Of Record (MOR) documentation for product transfer to production high‑volume manufacturing facilities.
• Integrate AI‑assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, while complying with organizational standards and legal requirements.
• Identify, test, and share AI‑enabled enhancements within one’s scope of work to promote continuous improvement.

Skills

Python

R

SQL

Data analytics

DOE

SPC

Problem solving

Education

PhD in Materials Science/Engineering or related

MS in related field

BS in related field

Tools

Visual Basic for automation

Job description

Principal/Staff Engineer – Advanced Packaging Die Level Technology Engineering

Develop and enable deployment of assembly processes for advanced packaging technologies to meet performance, cost, manufacturability, quality, reliability and schedule requirements. Work with peers and partners across organizations to coordinate the development and launch of new technologies and integration flows that drive the future.

Key Responsibilities and Duties

• Process Development:
  • Develop and optimize assembly processes for advanced packaging technologies, including wafer‑level packaging and die stacking (Chip on Wafer, Chip to Wafer).
  • Focus on improving product quality, driving yield improvements, reducing costs, and enhancing productivity.
  • Establish and enhance process‑management projects to deliver technology‑node requirements.
• Equipment and Materials:
  • Evaluate and promote new equipment and materials to enhance process capabilities.
  • Set up process parameters for a variety of semiconductor equipment.
  • Plan for new equipment and materials.
• Quality Improvement:
  • Ensure defense coverage through process, measurement, inspection, and testing.
  • Establish correlations between defense mechanisms to identify improvement opportunities.
  • Conduct continuous data analysis to establish advanced controls and identify improvement opportunities.
• Collaboration and Coordination:
  • Work closely with internal and external stakeholders to build and execute technology development strategies aligned with organizational and business objectives.
  • Collaborate with teams such as Package Integration, Assembly Engineering, Front End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality to integrate manufacturing processes for optimal performance and quality control.
  • Ensure smooth transition from new product development, qualification, small‑volume production to high‑volume production.
  • Provide Process Of Record (POR) and Model Of Record (MOR) documentation for product transfer to production high‑volume manufacturing facilities.
• AI Responsibilities:
  • Integrate AI‑assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, while complying with organizational standards and legal requirements.
  • Identify, test, and share AI‑enabled enhancements within one’s scope of work to promote continuous improvement.

Requirements

• B.S., M.S., Ph.D. (or equivalent) in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or related technical field.
• At least 2 years of semiconductor process development or equipment evaluation experience, preferably in wafer bonding, die stacking, and packaging.
• Proficiency in Python, R, SQL for statistical analysis, process modeling, and data analytics.
• Experience with Visual Basic for automation and tool integration.
• Familiarity with E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System) for equipment and process control.
• Strong data‑analytics capabilities to support SPC, DOE, defect analysis, and dashboarding.
• Strong understanding of process flows, process interactions, and how process changes can affect yield, performance, and reliability.
• Tenacity to work effectively under timelines and limited resources.
• Consistent track record of solving problems and addressing root causes.

Micron is proud to be an equal opportunity workplace and an affirmative‑action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.