Principal/Senior Engineer, APTD CEM - Advanced Packaging Integration Engineering

1100 Micron SemiAsiaOP Pte Ltd; Singapore; On-site; SGD 70,000 - 120,000; Full time

Job summary

1100 Micron SemiAsiaOP Pte Ltd is seeking an engineer to develop and enable advanced package technology for post-fab wafer finish and assembly processes. You will drive yield improvements, reduce costs, and collaborate with process and product engineering teams to integrate semiconductors.

The role requires strong data analytics skills (Python/R/SQL), experience with SPC/DOE, and familiarity with E3/FDC/RMS for equipment and process control. A PhD is welcomed but not required.

Qualifications

• A degree in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, or related fields.
• At least 2 years of semiconductor process integration experience.
• Proficiency in Python, R, SQL for analytics; experience with Visual Basic for automation and tool integration.

Responsibilities

• Develop and enable advanced package technology for post-fab wafer finish and assembly processes.
• Improve product quality, yield, cost, and productivity.
• Integrate semiconductors with process and product engineering teams.

Skills

Python

R

SQL

Visual Basic

Data analytics

SPC

DOE

Dashboarding

Education

B.S.

M.S.

Ph.D.

Tools

E3

FDC

RMS

Job description

Key Responsibilities

• Develop and enable advanced package technology for various post-fab wafer finish and assembly processes.
• Focus on improving product quality, driving yield improvements, reducing costs, and enhancing productivity.
• Integrate semiconductors while partnering with process and product engineering teams.
• Achieve and improve yields through silicon package integration innovation, including layout/design and process margin improvements.
• Collect and analyze data to provide actionable outcomes and decisions for layout, design, or integration flow changes.
• Work with Probe, Yield Analysis, Test, and Product Engineering teams to drive improvements.
• Ensure defense coverage through process, measurement, inspection, and testing.
• Establish correlations between defense mechanisms to identify improvement opportunities.
• Conduct continuous data analysis to establish advanced controls and identify improvement opportunities.
• Work closely with internal and external stakeholders to build and execute technology development strategies aligned with organizational and business objectives.
• Ensure smooth transition from new product development, qualification, small volume production to high volume production.
• Provide Process Of Record (POR) and Model Of Record (MOR) documentation for product transfer to production high volume manufacturing fabrication facilities.

Qualifications

• B.S., M.S., or Ph.D. (or equivalent education) in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, Material Science, or related technical fields.
• At least 2 years of semiconductor process integration experience, preferably with know-how to develop and enable advanced package technology for post-fab wafer finish and assembly processes.
• Proficiency in Python, R, SQL for statistical analysis, process modeling, and data analytics; experience with Visual Basic for automation and tool integration.
• Familiarity with E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System) for equipment and process control.
• Strong data analytics capabilities to support SPC, DOE, defect analysis, and dashboarding.
• Strong understanding of process flows, interactions, and ability to integrate semiconductors while partnering with process and product engineering teams.
• Ability to resolve complex issues through root-cause or model-based problem solving.
• Tenacity to work effectively under timelines and limited resources.
• Consistent track record of solving problems and addressing root causes.

Equal Employment Opportunity Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.