Principal/Senior Engineer, APTD CEM - Advanced Packaging Integration Engineering

WhiteCrow Research; Singapore; On-site; SGD 120,000 - 190,000; Full time

Job description

We are global talent research, insight, and sourcing specialists with offices in the UK, USA, Singapore, Malaysia, Hong Kong, Dubai, and India. Our international reach has helped us to understand and penetrate specialist markets at a global level. In addition to this, our service is also extended to complement our client's in-house talent acquisition teams.

About our client

Our client is a global technology leader specializing in advanced memory and storage solutions that power next-generation computing and data-driven applications. With strong expertise in semiconductor innovation, the organization develops high-performance memory technologies across DRAM, NAND, and storage platforms for applications spanning data centers, artificial intelligence, mobile devices, client computing, and intelligent edge ecosystems.

Driven by a commitment to technology advancement, operational excellence, and customer-centric innovation, the company plays a significant role in enabling modern digital infrastructure and compute-intensive workloads worldwide.

As a Principal/Senior Engineer, APTD CEM - Advanced Packaging Integration Engineering, you will be responsible for...

• Developing and enabling advanced package technologies for post-fab wafer finish and assembly processes.
• Improving product quality, yield, productivity, and manufacturing cost.
• Partnering with process and product engineering teams to integrate semiconductor technologies.
• Driving yield improvements through package integration innovation, layout optimization, design improvements, and process margin enhancement.
• Collecting and analyzing data to support design, layout, and integration flow decisions.
• Collaborating with Probe, Yield Analysis, Test, Product Engineering, PWF Engineering, Assembly Engineering, Front-End Wafer Fab, Assembly/Test Engineering, and Global Quality teams.
• Ensuring robust quality through process monitoring, inspection, testing, SPC, DOE, and defect analysis.
• Supporting product transition from development through qualification into High Volume Manufacturing (HVM).
• Providing Process of Record (POR) and Model of Record (MOR) documentation.

What you already have...

• B.S./M.S./Ph.D. (or equivalent) in Electrical, Mechanical, Chemical Engineering, Physics, Materials Science, or related discipline.
• 2+ years of semiconductor process integration experience, preferably in advanced packaging, post-fab wafer finishing, or assembly processes.
• Proficiency in Python, R, and SQL.
• Experience with Visual Basic.
• Knowledge of E3, FDC, and RMS (Recipe Management System).
• Strong statistical analysis, process modeling, SPC, DOE, defect analysis, and dashboarding skills.
• Strong understanding of semiconductor process flows and integration.
• Strong root-cause analysis and complex problem-solving capability.
• Ability to work under tight timelines and limited resources.
• SKills: Advanced Packaging Integration, Advanced Semiconductor Packaging, Wafer Bonding & Hybrid Bonding, Micro-Bump & Fine-Pitch Interconnects, Redistribution Layer