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PERSOL is seeking an experienced engineer for full-chip physical verification sign-off in a tape-out environment. You will collaborate with the Place & Route team, coordinate IP owners and manufacturing for DRC issues, and develop automation to streamline the tape-out flow.
The role requires 8+ years in IC design verification, strong scripting skills (Tcl, Perl, C-shell), and proficiency with UNIX/Linux platforms. Excellent communication and analytical abilities are essential.