Physical Verification Sign-off, Technical Manager

PERSOL

Singapore

On-site

SGD 120,000 - 180,000

Full time

3 days ago
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Job summary

PERSOL is seeking an experienced engineer for full-chip physical verification sign-off in a tape-out environment. You will collaborate with the Place & Route team, coordinate IP owners and manufacturing for DRC issues, and develop automation to streamline the tape-out flow.

The role requires 8+ years in IC design verification, strong scripting skills (Tcl, Perl, C-shell), and proficiency with UNIX/Linux platforms. Excellent communication and analytical abilities are essential.

Qualifications

  • Bachelor's or Master's degree in Electrical/Electronics Engineering or Computer Science.
  • Familiar with IC Design front-to-backend flow.
  • Minimum 8 years of relevant experience in the semiconductor industry.
  • Proficient in scripting (Tcl, Perl, or C-shell).
  • Proficient in UNIX (Linux) platforms.
  • Strong communication, problem solving and analytical skills.

Responsibilities

  • Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
  • Co-work with Place & Route team to resolve full-chip layout integration issues.
  • Coordinates with internal IP owners on IP related issues.
  • Coordinates with Manufacturing Team on DRC related issues.
  • Provide automation solutions to improve efficiency in tape-out flow.
  • Report on tape out issues

Skills

Tcl
Perl
C-shell
Unix/Linux
Communication skills
IC design flow

Education

Electrical/Electronics Engineering
Computer Science

Tools

Calibre
Assura
Star-RCXT

Job description

Job Responsibilities:
  • Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
  • Co-work with Place & Route team to resolve full-chip layout integration issues.
  • Coordinates with internal IP owners on IP related issues.
  • Coordinates with Manufacturing Team on DRC related issues.
  • Provide automation solutions to improve efficiency in tape-out flow.
  • Report on tape out issues
Job Requirements:
  • Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science
  • Familiar with IC Design front-to-backend flow
  • With a minimum of 8 years of relevant experience in similar industry
  • Preferably well-versed in Calibre, Assura, Star-RCXT
  • Proficient in script programming, such, Tcl, Perl or C-shell
  • Proficient in UNIX (Linux) platforms
  • Strong communication skills, problem solving and analytical skills
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