Memory IP Design Engineer: Custom Macros & Compiler Tech

Broadcom

Singapore

On-site

SGD 90,000 - 170,000

Full time

2 days ago
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Job summary

Broadcom is seeking energetic memory design engineers to join the Central Engineering Group. You will develop memory compilers and custom macros across process tech, analyzing architectures, and building blocks at gate/ transistor levels.

The role involves simulation, post-layout verification, floorplanning, and integration of characterization flows to extract timing and power. Strong scripting and leadership are valued for multi-tasking in a fast-paced environment.

Qualifications

  • BS in Electrical Engineering with 5+ years of related memory design experience.
  • Experience with memory compilers or custom digital circuits (SRAMs, Register-files, ROM).
  • Strong understanding of transistor-level circuit behavior and device physics.
  • Knowledge of signal integrity, EM/IR, and reliability analysis.
  • Familiarity with DFT schemes and chip-level integration.
  • Ability to run simulators, write automation scripts, and be tool-savvy.
  • Good communication and leadership skills; capable of multi-tasking.

Responsibilities

  • Analyze different memory architectures and highlight the tradeoffs.
  • Design and build memory or circuit blocks at the gate or transistor level.
  • Simulate and analyze the circuit design using transistor level simulators.
  • Extract the layout and perform post‑layout simulations and verification.
  • Floorplan physical implementation and leafcell layout integration to build the physical macro.
  • Integrate characterization flow to extract timing and power information.
  • Develop scripts to automate characterization flow, simulations, and verification.
  • Specify and verify various behavioral and physical memory models.
  • Document the design specifications, behavioral description, and timing diagrams.
  • Specify silicon test plan and correlate silicon to simulation data.
  • Help debug silicon issues.

Skills

Memory compiler development
Transistor-level circuit behavior
Signal integrity / EM/IR
Memory behavioral/physical models
DFT schemes / chip integration
Automation scripting
Communication / leadership
Multi-tasking

Education

BS in Electrical Engineering

Tools

SPICE simulators
Python scripting
EDA automation tools

Job description

Broadcom is seeking energetic memory design engineers to join the Central Engineering Group. You will develop memory compilers and custom macros across process tech, analyzing architectures, and building blocks at gate/ transistor levels.

The role involves simulation, post-layout verification, floorplanning, and integration of characterization flows to extract timing and power. Strong scripting and leadership are valued for multi-tasking in a fast-paced environment.

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