AI-Driven ASIC Memory Compiler Engineer

MediaTek; Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

MediaTek in Singapore is seeking a memory design automation engineer to collaborate with global teams on high-performance memory design. The role includes developing behavioral models and debugging SRAM models for ASIC design.

The ideal candidate will have proficiency in programming languages like Perl, Shell, Python, and C/C++. Experience with EDA tools and a good understanding of design flows is crucial for success in this position.

Qualifications

• Knowledge of high performance, low power SRAM/ROM design is an added advantage.
• Experience with EDA simulation tools such as VCS, NC is required.
• Good understanding of Verilog syntax (behavioral, RTL, synthesizable) is essential.

Responsibilities

• Develop behavioral, FPGA, timing and DFT simulation models for memory design.
• Debug and optimize SRAM models for ASIC design flow.
• Work collaboratively with worldwide memory design teams.

Skills

Perl

Shell

Python

C/C++

VLSI design

Tools

EDA tools

VCS

QuestaSim

PrimeTime

Job description

MediaTek in Singapore is seeking a memory design automation engineer to collaborate with global teams on high-performance memory design. The role includes developing behavioral models and debugging SRAM models for ASIC design.

The ideal candidate will have proficiency in programming languages like Perl, Shell, Python, and C/C++. Experience with EDA tools and a good understanding of design flows is crucial for success in this position.