Memory Compiler Automation Engineer – AI ASIC Design

MediaTek Research Lab Inc.; Singapore; On-site; SGD 60,000 - 80,000; Full time

Job summary

MediaTek Research Lab Inc. is seeking a Memory Design Automation Engineer to develop robust memory solutions and automation flows. The role involves creating simulation models and optimizing SRAM models for ASIC design.

Candidates should possess knowledge of high performance SRAM/ROM design and be proficient in programming languages like Python, C/C++, and Perl. Experience with EDA tools like VCS and NC is required.

Qualifications

• Experience with high performance, low power SRAM/ROM and VLSI design is an added advantage.
• Knowledge of behavioral, RTL and synthesizable Verilog is required.
• Experience with EDA tools is helpful.

Responsibilities

• Develop behavioral, FPGA, timing and DFT simulation models.
• Debug and optimize SRAM models for ASIC design flow.

Skills

Knowledge of SRAM/ROM and VLSI design

Proficient with Perl

Proficient with Shell

Proficient with Python

Proficient with C/C++

Understanding of AI machine learning algorithms

Good understanding of Verilog syntax

Understanding of liberty timing syntax

Experience with EDA simulation tools

Tools

EDA tools

VCS

NC

Job description

MediaTek Research Lab Inc. is seeking a Memory Design Automation Engineer to develop robust memory solutions and automation flows. The role involves creating simulation models and optimizing SRAM models for ASIC design.

Candidates should possess knowledge of high performance SRAM/ROM design and be proficient in programming languages like Python, C/C++, and Perl. Experience with EDA tools like VCS and NC is required.