Lead RTL & ISP Design Manager

OMNIVISION; Singapore; Vor Ort; SGD 80.000 - 120.000; Vollzeit

Zusammenfassung

A leading technology firm in Singapore is seeking an experienced Digital Design Engineer to implement ISP algorithms and oversee the design architecture. You will lead and mentor a team of RTL design engineers, collaborating closely with various teams. Required qualifications include an MSEE or BSEE and over 7 years of experience in digital design. Expertise in System Verilog and project management is essential. This role presents an excellent opportunity to shape innovative designs in a dynamic environment.

Qualifikationen

• Minimum of 7+ years of Digital Design and verification related experience.
• Proven project management and people management experience.
• Experience in CMOS Image Sensor and image signal processing.

Aufgaben

• Implement ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC.
• Define ISP HW Architecture based on product features and performance.
• Verify Logic at ISP level and Digital System level.

Kenntnisse

Digital Design

Project Management

Team Leadership

Communication

Ausbildung

MSEE or BSEE or equivalent

Tools

System Verilog

System C/C++

Catapult HLS tool

Jobbeschreibung

A leading technology firm in Singapore is seeking an experienced Digital Design Engineer to implement ISP algorithms and oversee the design architecture. You will lead and mentor a team of RTL design engineers, collaborating closely with various teams. Required qualifications include an MSEE or BSEE and over 7 years of experience in digital design. Expertise in System Verilog and project management is essential. This role presents an excellent opportunity to shape innovative designs in a dynamic environment.