Senior Digital IC Design Engineer RTL/FPGA Verif Lead
ZERRO POWER SYSTEMS PTE. LTD.
Singapore
On-site
SGD 75,000 - 95,000
Full time
14 days+
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Job summary
A leading technology firm in Singapore is looking for a skilled engineer with expertise in RTL-level digital design and FPGA verification. The ideal candidate should hold a Bachelor/Masters in Electronics/Electrical Engineering and possess 7-10 years of experience. Responsibilities include guiding junior engineers, collaborating with backend teams, and performing digital functional verification. Proficiency in Verilog coding and experience with Cadence tools are strongly preferred, making this an excellent opportunity for a seasoned professional.
Qualifications
7-10 years of experience in application/validation.
Experience in defining and implementing custom digital interfaces.
Knowledge of working with multiple clock domains.
Responsibilities
Lead and guide junior engineers.
Verify digital functions and support backend teams.
Conduct RTL design for different applications.
Skills
RTL-level digital design
Verilog coding
Digital synthesis
FPGA verification
Mixed Signal IC design
Logic synthesis
Education
Bachelor/Masters in Electronics/Electrical Engineering
Tools
Cadence tools
Job description
A leading technology firm in Singapore is looking for a skilled engineer with expertise in RTL-level digital design and FPGA verification. The ideal candidate should hold a Bachelor/Masters in Electronics/Electrical Engineering and possess 7-10 years of experience. Responsibilities include guiding junior engineers, collaborating with backend teams, and performing digital functional verification. Proficiency in Verilog coding and experience with Cadence tools are strongly preferred, making this an excellent opportunity for a seasoned professional.