ISP RTL Design Engineer - Low-Power HW & Verification

OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD.; Singapore; On-site; SGD 60,000 - 80,000; Full time

Job summary

OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. is seeking a skilled engineer to implement ISP Algorithms into hardware using Verilog, SystemVerilog, and/or SystemC. The ideal candidate will have a minimum of a Master’s or Bachelor’s degree in Electrical Engineering, experience in RTL and C/C++ programming, strong debugging skills, and excellent communication abilities. The role includes optimizing design for efficiency and collaborating with the ISP Algorithm team in Singapore.

Qualifications

• Minimum MSEE, or BSEE, or related/equivalent discipline.
• Experience in RTL, C/C++ programming and verification.
• Strong debugging and problem-solving skills.
• Good communication and interpersonal skills.
• Results-oriented and adaptable to changes.
• C++/SystemC knowledge with High Level Synthesis experience is a plus.
• Experience in CMOS Image Sensor is a plus.

Responsibilities

• Implement ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC.
• Verify Logic at ISP level and Digital System level.
• Optimize Design for less gate count and low power consumption.
• Drive ISP Design activities in close collaboration with ISP Algorithm Team.

Skills

RTL programming

C/C++ programming

Debugging skills

Interpersonal skills

Adaptability

Education

Minimum MSEE or BSEE

Tools

Verilog

SystemVerilog

SystemC

Job description

OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. is seeking a skilled engineer to implement ISP Algorithms into hardware using Verilog, SystemVerilog, and/or SystemC. The ideal candidate will have a minimum of a Master’s or Bachelor’s degree in Electrical Engineering, experience in RTL and C/C++ programming, strong debugging skills, and excellent communication abilities. The role includes optimizing design for efficiency and collaborating with the ISP Algorithm team in Singapore.