Automotive SoC IC Design Engineer | Verilog/RTL

KINGFISHER RECRUITMENT (SINGAPORE) PTE. LTD.

Singapore

On-site

SGD 90,000 - 130,000

Full time

7 days ago
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Job summary

KINGFISHER RECRUITMENT (SINGAPORE) PTE. LTD. is seeking an IC Design Engineer to join a fast-growing automotive SoC project in Singapore. The role involves architecting digital blocks, writing synthesizable RTL in Verilog/SystemVerilog, and verifying designs with lint, CDC, and low-power checks.

You will collaborate with verification teams, perform timing analyses, and contribute to pre- and post-silicon activities, while documenting design specifications for cross-functional teams.

Qualifications

  • Bachelor’s or Master’s degree in Electrical/Electronics Engineering or related discipline.
  • Experience with ASIC design flows and methodologies.
  • Strong Verilog or SystemVerilog RTL coding skills.
  • Hands-on experience with logic synthesis and timing analysis.
  • Scripting in TCL or Python; familiarity with EDA tools (Synopsys/Cadence/Siemens).

Responsibilities

  • Develop micro-architectures for complex digital blocks and implement synthesizable RTL using Verilog/SystemVerilog.
  • Perform lint checks, CDC checks, and low-power verification using UPF/CPF.
  • Carry out logic synthesis, develop timing constraints, and support timing closure.
  • Collaborate with verification engineers to define test plans and resolve design issues.
  • Support pre-silicon validation and post-silicon bring-up and debugging.
  • Create and maintain design specifications and technical documentation.

Skills

Verilog/SystemVerilog RTL
Timing analysis
Scripting (TCL/Python)
Logic synthesis
Cross-team collaboration

Education

Bachelor’s or Master’s degree in Electrical/Electronics Engineering

Tools

Synopsys
Cadence
Siemens

Job description

KINGFISHER RECRUITMENT (SINGAPORE) PTE. LTD. is seeking an IC Design Engineer to join a fast-growing automotive SoC project in Singapore. The role involves architecting digital blocks, writing synthesizable RTL in Verilog/SystemVerilog, and verifying designs with lint, CDC, and low-power checks.

You will collaborate with verification teams, perform timing analyses, and contribute to pre- and post-silicon activities, while documenting design specifications for cross-functional teams.

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