Automotive SoC IC Design Engineer - Verilog & Low Power

Kingfisher Recruitment Singapore Pte Ltd; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

Kingfisher Recruitment Singapore Pte Ltd is seeking an IC Design Engineer to join their first overseas R&D team in Singapore, focusing on automotive SoCs with cockpit and driver-assistance features. The role involves RTL development, verification, and collaboration across engineering teams.

Ideal candidates will have a degree in Electrical/Electronics Engineering and hands-on experience with ASIC flows and EDA tools. Strong problem-solving and cross-team collaboration are valued.

Qualifications

• Bachelor's or master's degree in Electrical/Electronics Engineering or related field.
• Experience with ASIC design flows and methodologies.
• Strong Verilog or SystemVerilog RTL coding skills.
• Hands-on experience with logic synthesis, timing analysis, and TCL/Python scripting.
• Familiarity with industry-standard EDA tools (Synopsys/Cadence/Siemens).

Responsibilities

• Develop micro-architectures for complex digital blocks and implement synthesizable RTL using Verilog/SystemVerilog.
• Perform lint checks, clock domain crossing (CDC) checks, and low-power verification using UPF/CPF.
• Carry out logic synthesis, develop timing constraints, and support timing closure.
• Collaborate with verification engineers to define test plans and resolve design issues.
• Support pre-silicon validation and post-silicon bring-up and debugging.
• Create and maintain design specifications and technical documentation.

Skills

Verilog/SystemVerilog

Logic synthesis

Timing analysis

Scripting (TCL/Python)

EDA tools knowledge

Low-power design awareness

Team collaboration

Education

Electrical/Electronics Engineering degree

Tools

Synopsys tools

Cadence tools

Siemens tools

Job description

Kingfisher Recruitment Singapore Pte Ltd is seeking an IC Design Engineer to join their first overseas R&D team in Singapore, focusing on automotive SoCs with cockpit and driver-assistance features. The role involves RTL development, verification, and collaboration across engineering teams.

Ideal candidates will have a degree in Electrical/Electronics Engineering and hands-on experience with ASIC flows and EDA tools. Strong problem-solving and cross-team collaboration are valued.