Automotive SoC Design Verification Engineer

Black Sesame Technologies (Singapore) Pte Ltd; Singapore; On-site; SGD 70,000 - 110,000; Full time

Job summary

Black Sesame Technologies (Singapore) Pte Ltd in Singapore seeks an Engineer, Design Verification to join a fast-paced automotive SoC verification team. You will develop verification platforms and test cases using SystemVerilog and UVM, promote FPV, and perform RTL and gate-level simulations with regression testing.

The ideal candidate has an advanced degree in electrical/computer engineering or CS and hands-on experience with SystemVerilog, Python, Perl, or Shell for debugging and tooling.

Qualifications

• Master’s or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
• Internship or project experience in chip design/verification preferred. Open to fresh graduates with relevant coursework or research experience.
• Proficiency in SystemVerilog and scripting languages such as Python, Perl, or Shell.
• Strong analytical and debugging skills; ability to work through complex technical challenges.
• Collaborative mindset with strong communication skills and willingness to learn in a fast-paced team environment.

Responsibilities

• Develop verification platforms and test cases using SystemVerilog and UVM based on verification plans.
• Promote and implement Formal Property Verification (FPV) for relevant design modules.
• Perform RTL and gate-level simulation, execute regression tests, and debug failures.
• Analyze code and functional coverage to identify and close coverage gaps.
• Contribute ideas and improvements to enhance verification methodologies and processes.

Skills

SystemVerilog

UVM

Python

Perl

Shell

Debugging

Teamwork

Education

Master’s or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related fields

Tools

SystemVerilog

Job description

Black Sesame Technologies (Singapore) Pte Ltd in Singapore seeks an Engineer, Design Verification to join a fast-paced automotive SoC verification team. You will develop verification platforms and test cases using SystemVerilog and UVM, promote FPV, and perform RTL and gate-level simulations with regression testing.

The ideal candidate has an advanced degree in electrical/computer engineering or CS and hands-on experience with SystemVerilog, Python, Perl, or Shell for debugging and tooling.