IC Design Engineer | Automotive SoC

KINGFISHER RECRUITMENT (SINGAPORE) PTE. LTD.; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

KINGFISHER RECRUITMENT (SINGAPORE) PTE. LTD. is seeking an IC Design Engineer to join a fast-growing automotive SoC project in Singapore. The role involves architecting digital blocks, writing synthesizable RTL in Verilog/SystemVerilog, and verifying designs with lint, CDC, and low-power checks.

You will collaborate with verification teams, perform timing analyses, and contribute to pre- and post-silicon activities, while documenting design specifications for cross-functional teams.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering or related discipline.
• Experience with ASIC design flows and methodologies.
• Strong Verilog or SystemVerilog RTL coding skills.
• Hands-on experience with logic synthesis and timing analysis.
• Scripting in TCL or Python; familiarity with EDA tools (Synopsys/Cadence/Siemens).

Responsibilities

• Develop micro-architectures for complex digital blocks and implement synthesizable RTL using Verilog/SystemVerilog.
• Perform lint checks, CDC checks, and low-power verification using UPF/CPF.
• Carry out logic synthesis, develop timing constraints, and support timing closure.
• Collaborate with verification engineers to define test plans and resolve design issues.
• Support pre-silicon validation and post-silicon bring-up and debugging.
• Create and maintain design specifications and technical documentation.

Skills

Verilog/SystemVerilog RTL

Timing analysis

Scripting (TCL/Python)

Logic synthesis

Cross-team collaboration

Education

Bachelor’s or Master’s degree in Electrical/Electronics Engineering

Tools

Synopsys

Cadence

Siemens

Job description

IC Design Engineer | Automotive SoC

Our client is an innovative semiconductor company expanding its international R&D footprint, developing advanced automotive SoCs that integrate intelligent cockpit and driver-assistance capabilities. As part of this expansion, the company is building its first overseas R&D team in Singapore and is seeking an IC Design Engineer.

Key Responsibilities

• Develop micro-architectures for complex digital blocks and implement synthesizable RTL using Verilog/SystemVerilog.
• Perform lint checks, clock domain crossing (CDC) checks, and low-power verification using UPF/CPF.
• Carry out logic synthesis, develop timing constraints, and support timing closure.
• Collaborate with verification engineers to define test plans and resolve design issues.
• Support pre-silicon validation and post-silicon bring-up and debugging.
• Create and maintain design specifications and technical documentation.

Requirements

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related discipline.
• Experience with ASIC design flows and methodologies.
• Strong Verilog or SystemVerilog RTL coding skills.
• Hands-on experience with logic synthesis, timing analysis, and scripting in TCL or Python.
• Familiarity with industry-standard EDA tools from Synopsys, Cadence, or Siemens.
• Knowledge of low-power design and power integrity would be an advantage.
• Strong problem-solving skills and the ability to collaborate across engineering teams.

We regret to inform that only shortlisted candidates would be notified.