Semiconductor Design Verification Engineer

Realtek Semiconductor Corp.

Singapore

On-site

SGD 90,000 - 130,000

Full time

2 days ago
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Job summary

Realtek Singapore is seeking a seasoned SOC/IP verification engineer to design and execute comprehensive verification plans for complex IP blocks and SoC architectures. The role focuses on building end-to-end verification environments, including stimulus, checkers, assertions, and scoreboards, and integrating with broader DV bring-up efforts.

The ideal candidate will have strong communication and documentation skills, experience with SystemVerilog, UVM, and Python, and the ability to work in a

Qualifications

  • Bachelor or Master in Electronics/Electrical Engineering.
  • Minimum 6+ years of SOC/IP verification experience.
  • Experience with ASIC verification methodologies and flows.

Responsibilities

  • Develop detailed module-level and SoC-level test plans based on design specs.
  • Create ASIC verification environments including stimulus, checkers, assertions, monitors and scoreboards.
  • Develop directed and constraint-random tests and simulate using EDA tools to verify specs.
  • Execute verification plans, bring-up DV, and enable regression for all features.
  • Collaborate with the digital design team to debug test cases and ensure functional designs.

Skills

Strong communication
Analytical
Documentation skills
Interfacing with groups
Independent task handling
Timely delivery

Education

Bachelors/Masters in Electronics/Electrical Engineering

Tools

SystemVerilog
UVM
Python
TCL/Perl

Job description

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition.

  • Develop detailed module level and SoC level test plans for all the functional features, based on the design spec.
  • Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.
  • Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working.
  • Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.
  • Collaborate with digital design team to debug functional testcases and deliver functionally correct designs.

The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.

JOB REQUIREMENTS
  • Bachelor/Masters in Electronics/Electrical Engineering.
  • Level of Expertise: At least 6+ year of SOC/IP verification skills.
  • Strong communication, analytical and documentation skills and ability to interface with other groups.
  • Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products.
  • Strong hardware functional verification language and Object-oriental language development skill.
  • Preferred with strong knowledge in System Verilog, UVM, Python (TCL/Perl a plus)
  • Familiar with ASIC verification methodology, tools, and development flow.
  • Prior experience related to Automotive SoCs, Ethernet/Switch based IPs, High Speed IOs , Memory controllers (like DDR,PSRAM,Flash etc), Video (MIPI/CSI/DSI/HDMI/DP etc) or similar is an added plus.
  • Able to handle tasks independent, estimate efforts and deliver results on time.
  • Actively participate in resolving issues related to verification tasks in the project.
  • Contribute to the overall improvement of verification at IP and SoC levels.

Personal Data Protection Notice: By submitting your application, you acknowledge that the personal data provided may be collected, used and disclosed by Realtek Singapore for recruitment and employment-related purposes, including the assessment of your application and other suitable employment opportunities within Realtek. Your personal data may also be shared with relevant Realtek group companies and authorised personnel outside Singapore where necessary for recruitment purposes, subject to appropriate data protection safeguards and applicable laws.

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