Analog Circuit Design Engineer (High Speed Serdes)

SERDESWORKS PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

SerDesWorks Pte Ltd in Singapore seeks an Analog Circuit Design Engineer specializing in high-speed SerDes PHY to bolster our IP portfolio and support international market expansion.

You will design TX/RX, PLL/CDR/CTLE, analyze jitter and signal integrity, apply CTLE/DFE/FFE, and prototype in Cadence Virtuoso/Synopsys tools, with MATLAB/Python scripting to automate workflows.

Qualifications

• Experience in high-speed SerDes PHY design.
• PLL/CDR/CTLE expertise desired.
• Strong background in analog CMOS design and layout.

Responsibilities

• Design and develop PLL, CDR, and CTLE circuits to support high-speed SerDes PHY functionality.
• Implement and optimize high-speed transmitter (TX) and receiver (RX) circuits operating above 5 Gbps to meet performance targets.
• Analyze jitter and signal integrity to ensure robust data transmission and system reliability.
• Apply equalization techniques including CTLE, DFE, and FFE to enhance signal quality in high-speed communication channels.
• Utilize CMOS analog design fundamentals to create efficient and scalable analog circuit components.
• Operate Cadence Virtuoso or Synopsys Custom Compiler environments to perform custom IC design and layout tasks.
• Conduct circuit simulations and verification using HSPICE and PrimeSim to validate design performance.
• Develop scripts and tools in MATLAB or Python to automate design processes and improve engineering productivity.

Skills

SerDes design

Analog circuit design

Jitter analysis

Signal integrity

CMOS analog design

Scripting (MATLAB/Python)

Tools

Cadence Virtuoso

Synopsys Custom Compiler

HSPICE

PrimeSim

Job description

Job Title

Analog Circuit Design Engineer (High Speed SerDes PHY)

Occupation

INTEGRATED CIRCUIT DESIGNER

Job Description & Requirements

Company Overview

SerDesWorks Pte Ltd is located in Singapore, specializing in proprietary semiconductor IP development and advanced SerDes PHY design for international markets, focusing on high-speed, deep-tech solutions and engineering productivity improvements.

Job Summary

This role strengthens SerDesWorks' engineering capabilities in high-speed SerDes PHY development, supporting advanced node designs and international market expansion with competitive PHY solutions.

Responsibilities

• Design and develop PLL, CDR, and CTLE circuits to support high-speed SerDes PHY functionality.
• Implement and optimize high-speed transmitter (TX) and receiver (RX) circuits operating above 5 Gbps to meet performance targets.
• Analyze jitter and signal integrity to ensure robust data transmission and system reliability.
• Apply equalization techniques including CTLE, DFE, and FFE to enhance signal quality in high-speed communication channels.
• Utilize CMOS analog design fundamentals to create efficient and scalable analog circuit components.
• Operate Cadence Virtuoso or Synopsys Custom Compiler environments to perform custom IC design and layout tasks.
• Conduct circuit simulations and verification using HSPICE and PrimeSim to validate design performance.
• Develop scripts and tools in MATLAB or Python to automate design processes and improve engineering productivity.