Senior / Staff Serdes Analog Design

Uni Connect; Singapore; On-site; SGD 80,000 - 120,000; Full time

Job summary

A prominent engineering firm in Singapore is seeking a Senior ASIC Design Engineer to participate in high-level product specifications and delivery of AMS circuits in SerDes. Candidates should have over 4 years of ASIC design experience, along with strong AMS circuit design skills and familiarity with high-speed interfaces like DDR and PCIe. This position requires excellent problem-solving abilities, as well as strong organizational and communication skills, with English being mandatory and Chinese preferred.

Qualifications

• More than 4 years (senior engineer) and 6 years (staff engineer) of ASIC design experience.
• Familiar with ASIC development process.
• Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred.

Responsibilities

• Participate in high-level product specifications and high-speed memory interfaces design.
• Delivery of AMS circuits in SerDes, evaluating circuit topologies.
• Work with verification team for lab debugging.

Skills

AMS circuit design skills

High-speed interface design

Problem-solving

Communication skills

Organizational skills

Education

Bachelor's degree in communications, electronic engineering or computer engineering

Master’s degree preferred

Tools

Cadence Virtuoso

Calibre

Hspice/Spectre

Nanotime

Job description

Singapore, Singapore | Posted on 10/04/2024

• Participate in high-level product specifications, microarchitecture and implementation of high-speed memory interfaces
  
• Responsible for delivery of AMS circuits in SerDes, including the evaluation of different circuit topologies
  
• Worked on high-speed serial and parallel interface design, defining specifications and implementing modules such as bandgap, bias circuits, LDO regulators, amplifiers, comparators, switched capacitor circuits, ADCs, DACs, oscillators, filters, Tx/Rx equalization techniques and circuits such as de-emphasis, CTLE, DFE, CDR architecture and implementation, high-speed digital circuits (serializers, deserializers, counters, dividers, etc.)
  
• Work with the verification team for lab debugging
  
• Work with the software team and/or customers to solve problems, debug and tune system performance
  

Requirements

• Bachelor's degree in communications, electronic engineering or computer engineering, master’s degree preferred
  
• More than 4 years (senior engineer) and 6 years (staff engineer) of ASIC design experience, familiar with ASIC development process
  
• Good AMS circuit design skills and EDA tools such as Cadence Virtuoso, Calibre, Hspice/Spectre, and static timing analysis tools (e.g., Nanotime)
  
• Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred
  
• Ability to solve customer problems and deliver results in a timely manner
  
• Strong organizational and communication skills where English is a must and Chinese is preferred