Senior SerDes Analog Design Engineer

Uni Connect; Singapore; On-site; SGD 80,000 - 120,000; Full time

Job summary

A prominent engineering firm in Singapore is seeking a Senior ASIC Design Engineer to participate in high-level product specifications and delivery of AMS circuits in SerDes. Candidates should have over 4 years of ASIC design experience, along with strong AMS circuit design skills and familiarity with high-speed interfaces like DDR and PCIe. This position requires excellent problem-solving abilities, as well as strong organizational and communication skills, with English being mandatory and Chinese preferred.

Qualifications

• More than 4 years (senior engineer) and 6 years (staff engineer) of ASIC design experience.
• Familiar with ASIC development process.
• Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred.

Responsibilities

• Participate in high-level product specifications and high-speed memory interfaces design.
• Delivery of AMS circuits in SerDes, evaluating circuit topologies.
• Work with verification team for lab debugging.

Skills

AMS circuit design skills

High-speed interface design

Problem-solving

Communication skills

Organizational skills

Education

Bachelor's degree in communications, electronic engineering or computer engineering

Master’s degree preferred

Tools

Cadence Virtuoso

Calibre

Hspice/Spectre

Nanotime

Job description

A prominent engineering firm in Singapore is seeking a Senior ASIC Design Engineer to participate in high-level product specifications and delivery of AMS circuits in SerDes. Candidates should have over 4 years of ASIC design experience, along with strong AMS circuit design skills and familiarity with high-speed interfaces like DDR and PCIe. This position requires excellent problem-solving abilities, as well as strong organizational and communication skills, with English being mandatory and Chinese preferred.