Senior Analog Design Engineer: High-Speed IP & SerDes

CURIOUS TEK PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

CURIOUS TEK PTE. LTD. seeks an experienced engineer for design and implementation of mixed-signal CMOS IP. The role covers the full development cycle from circuit design to bench characterization, with emphasis on high-speed Serdes and analog layouts.

Candidates should have a Bachelor's in Microelectronics or related field and 5+ years in analog design, plus strong SPICE tool experience and familiarity with Cadence Spectre, Synopsys Custom Compiler, and Calibre.

Qualifications

• Bachelor or above degree in Microelectronic or Electronic and Information Engineering.
• 5+ years of experience in analog design.
• Strong knowledge of high-speed Serdes (PLL, CDR, CTLE/DFE, TX driver).

Responsibilities

• Design and implementation of mixed signal CMOS IP across development cycles, including circuit design, simulation, modeling, verification and bench characterization.
• Manage products utilizing leading-edge sub-micron CMOS technologies (e.g., 5/6nm).
• Develop state-of-the-art high-speed mixed-signal IP products (op amps, comparators, bandgap, LDOs, ADCs, DC-DC, Gbps Serdes TX/RX).

Skills

Analog design

Serdes knowledge

SPICE tools

Education

Bachelor or above in Microelectronic or Electronic and Information Engineering

Tools

Cadence Spectre

Synopsys Custom Compiler

Calibre

Job description

CURIOUS TEK PTE. LTD. seeks an experienced engineer for design and implementation of mixed-signal CMOS IP. The role covers the full development cycle from circuit design to bench characterization, with emphasis on high-speed Serdes and analog layouts.

Candidates should have a Bachelor's in Microelectronics or related field and 5+ years in analog design, plus strong SPICE tool experience and familiarity with Cadence Spectre, Synopsys Custom Compiler, and Calibre.