Security Digital Design Engineer, Staff

Synopsys, Inc.; Moreira; Presencial; EUR 60 000 - 90 000; Tempo integral

Resumo da oferta

Synopsys, Inc. in Porto seeks an ASIC Digital Design Engineer with RTL expertise to develop and verify Security IP cores.

You will implement RTL in Verilog and SystemVerilog, build UVM-based test environments, and collaborate with security engineers to ensure robust threat-resilient IP. Ideal candidates have a MSc/PhD in engineering, 3+ years in RTL/ASIC design, and strong verification skills in SystemVerilog, UVM, and Verilog.

Qualificações

• MSc or PhD in Electrical Engineering or Computer Science.
• 3+ years of RTL design for hardware IP components with synthesizable SystemVerilog experience.
• Proficiency in ASIC verification using SystemVerilog, UVM, and/or Verilog.
• Ability to create detailed test environments specifications.
• Strong understanding of IC design flows and debugging skills.

Responsabilidades

• Design and implement RTL in Verilog and SystemVerilog for Security IP cores.
• Build and maintain test environments for digital hardware Security IP using SystemVerilog and UVM.
• Verify IP cores and subsystems using UVM testbenches and formal verification tools.
• Collaborate with hardware and software security engineers to evaluate correctness and performance.
• Contribute to design specs, verification plans, and documentation for global development and customer integration.
• Work with an international team across time zones and coordinate reviews and milestones.

Conhecimentos

RTL design

SystemVerilog

UVM

Verilog

ASIC verification

Security IP

Formação académica

MSc or PhD in Electrical Engineering or Computer Science

Ferramentas

SystemVerilog

UVM

Verilog

Descrição da oferta de emprego

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely withour customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You are a passionate and skilled ASIC Digital Design Engineer with knowledge in RTL design and verification and focus on building hardware that must be both performant and secure. Your work in digital design has taught you that security cannot be an afterthought, it must be architected into the IP from the beginning. You understand the interplay between hardware design decisions and security implications, and you make design choices that account for both functional correctness and threat resilience.

What You’ll Be Doing

• Design and implement RTL in Verilog and SystemVerilog for Security IP cores, translating security requirements into synthesizable, verifiable hardware
• Build and maintain test environments for digital hardware Security IP using SystemVerilog and UVM, ensuring coverage of corner cases and attack scenarios
• Verify IP cores and subsystems using modern verification techniques including UVM testbenches and formal verification tools
• Collaborate with hardware and software security engineers to analyse functional correctness and performance of embedded IP solutions across threat models
• Contribute to detailed design specifications, verification plans, and documentation that support global development and customer integration
• Work within an international team across time zones, coordinating design reviews, debugging sessions, and milestone deliveries

The Impact You Will Have

• Strengthen the security posture of IP cores that protect critical systems in automotive, AI, and high-performance computing applications
• Enable faster SoC integration by delivering IP that meets strict performance, power, and area requirements without compromising security
• Reduce customer risk and time-to-market by ensuring IP is verified to the highest standards before it ships
• Driving innovation in the fields of CyberSecurity, High Performance Computing, Artificial Intelligence, and Automotive.
• Advance the state of hardware security design within Synopsys, contributing techniques and methods that influence future IP development
• Support the growth of Synopsys Security IP in high-growth markets where trust and resilience are non-negotiable
• Help maintain Synopsys' leadership position in delivering silicon IP that customers depend on for differentiation and compliance

What You’ll Need

• MSc or PhD in Electrical Engineering or Computer Science.
• 3+ years of strong working knowledge of RTL design for hardware IP components, with hands-on experience writing synthesizable SystemVerilog
• Ability to create detailed specifications for test environments.
• Proficiency in ASIC verification using System Verilog, UVM, and or Verilog
• Strong understanding of IC Design flows and exceptional problem-solving and debugging skills.
• Experience with hardware security concepts or cryptographic IP is a plus

Who You Are

• A strong communicator with excellent written and verbal skills.
• A team player who thrives in a collaborative international environment.
• An innovative thinker who is passionate about technology and continuous improvement.
• Detail-oriented and committed to delivering high-quality work.
• Adaptable and able to manage multiple tasks effectively.

The Team You'll Be Part Of

You will be joining the Security IP team in Porto, a dynamic group focused on extending Synopsys Security IP into markets including CyberSecurity, High Performance Computing, Artificial Intelligence, and Automotive. The team is made up of hardware and software security experts working together to develop state-of-the-art IP cores and subsystems. Collaboration, creativity, and a commitment to excellence define how the team operates.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.