DFT Lead, Semiconductors — Hybrid Team Lead

Capgemini Engineering; Lublin; Hybrid; PLN 180,000 - 240,000; Full time

Benefits offered by this job

Medical care (Medicover)

Private life insurance

Sports card

Capgemini Helpline for wellbeing

Education-first language platform & Ud

Hybrid working model with home office

Job summary

Capgemini Engineering Poland is seeking an experienced DFT Engineer to drive design-for-test activities across advanced SOCs. You will implement inline DFT, insert patterns, and validate test methodologies in collaboration with the physical design team.

You will verify DFT circuitry, debug timing simulations, and improve KPIs like coverage and efficiency. A lead role in a multi-site DFT team may be offered.

Qualifications

• 6+ years of hands-on DFT and test-flows experience for large SOCs.
• Strong knowledge of DFT techniques including JTAG, ATPG, yield learning, and MBIST/LBIST.
• Experience with major EDA toolchains (Synopsys/Tetramax/VCS/Tessent).
• Proficiency in Perl/Tcl/Python scripting; strong analytical skills.

Responsibilities

• Implement DFT inline with test methodologies for advanced nodes.
• Perform top- or block-level DFT insertion and validation of patterns.
• Collaborate with physical design to resolve timing constraints.
• Verify DFT circuitry and interfaces with IPs and debug timing issues.

Skills

DFT techniques and test flows

JTAG/ATPG/MBIST/LBIST

IEEE 1500 standard

Scripting (Perl/Tcl/Python)

RTL simulation, synthesis, Linting

Analytical problem solving

Tools

Synopsys DFT Compiler

Tetramax

VCS

Tessent

Modus/Encounter

Job description

Capgemini Engineering Poland is seeking an experienced DFT Engineer to drive design-for-test activities across advanced SOCs. You will implement inline DFT, insert patterns, and validate test methodologies in collaboration with the physical design team.

You will verify DFT circuitry, debug timing simulations, and improve KPIs like coverage and efficiency. A lead role in a multi-site DFT team may be offered.