Senior DFT Lead, Semiconductors & Test

Capgemini Engineering; Poznań; Hybrid; PLN 180,000 - 260,000; Full time

Benefits offered by this job

Medicover health care

Private life insurance

Sports card

Capgemini Helpline for wellbeing

Training & certifications

Job summary

Capgemini Engineering in Poznań invites an experienced DFT/validation engineer to join our global engineering team. You will work on DFT flows for advanced SOCs, collaborate with design and verification, and contribute to KPI improvements.

The role offers hybrid work, access to top EDA tools, and opportunities to lead a multi-site DFT team. Strong scripting and RTL experience are preferred. Engagement includes silicon bring-up and test-coverage optimization.

Qualifications

• 6+ years of hands-on experience with DFT and test flows for large SOCs.
• Strong knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std. and MBIST/LBIST.
• Experience with one of the main EDAs providers: Synopsys DFT Compiler, Tetramax, VCS, Tessent and Modus/Encounter tool suite.
• Experience in RTL simulation, synthesis, Linting, CDC and RDC checks, STA, DFT, quality metrics is a plus.
• Hands-on in Perl/Tcl/Python scripting.
• Excellent analytical, and problem-solving skills.

Responsibilities

• DFT implementation inline with existing test methodology for advanced process nodes.
• Perform top and/or block-level DFT insertion: scan compression, iJTAG, ATPG, patterns validation/simulation, MBIST/LBIST.
• Closely work with physical design team to resolve timing constraints/issues.
• Verify DFT circuitry and interface with other components/IPs and debug timing simulation issues.
• Debug and improve important DFT KPIs: test coverage/pattern efficiency.
• Hierarchical retargeting.
• Silicon bring-up, diagnosis and support for physical failure analysis.
• Opportunity to Lead a multilocational team of DFT engineers.

Skills

DFT techniques

JTAG

ATPG

MBIST/LBIST

RTL simulation

Python scripting

Perl/Tcl

Analytical skills

Team leadership

Tools

Synopsys DFT Compiler

Tetramax

VCS

Tessent

Modus/Encounter

Job description

Capgemini Engineering in Poznań invites an experienced DFT/validation engineer to join our global engineering team. You will work on DFT flows for advanced SOCs, collaborate with design and verification, and contribute to KPI improvements.

The role offers hybrid work, access to top EDA tools, and opportunities to lead a multi-site DFT team. Strong scripting and RTL experience are preferred. Engagement includes silicon bring-up and test-coverage optimization.