Senior ASIC DV Lead — Verification Architect

Micron Technology, Inc; Hinoba-an; On-site; PHP 2,000,000 - 2,800,000; Full time

Job summary

Micron Technology, Inc. seeks a Principal Engineer for ASIC DV to drive verification of IP/Block and Subsystem designs. You will lead testbench development, verification planning, and cross-functional collaboration across global teams.

Strong RTL debugging, SystemVerilog, and UVM expertise are essential for success. Ideal candidates have 10+ years in ASIC DV, with experience in AXI/AHB, PCIe/NVMe, and DDR protocols, plus mentoring abilities.

Qualifications

• MS/ME or BS/BE in Electronics with 10+ years of experience.
• Expertise in IP/Block/Subsystem level verification.
• Experience with AXI/AHB AMBA protocols.
• Knowledge of PCIe/NVMe/DDR protocols and related controllers.
• Proven Verilog/SystemVerilog and RTL debugging skills.

Responsibilities

• Verify IP/Block/Subsystem using SystemVerilog/UVM testbenches.
• Lead verification planning, development, and sign-off.
• Mentor a team of DV engineers and drive coverage plans.
• Collaborate across global teams on core initiatives.
• Ensure first-pass product quality and verification sign-off.

Skills

IP/Block verification

Subsystem verification

UVM environment

Testbench development

RTL debugging

Verilog

SystemVerilog

Scoreboard

Assertions

Functional coverage

Education

M.S./M.Tech in Electronics

B.S./B.E. in Electronics

Tools

UVM

RTL debugging tools

Job description

Micron Technology, Inc. seeks a Principal Engineer for ASIC DV to drive verification of IP/Block and Subsystem designs. You will lead testbench development, verification planning, and cross-functional collaboration across global teams.

Strong RTL debugging, SystemVerilog, and UVM expertise are essential for success. Ideal candidates have 10+ years in ASIC DV, with experience in AXI/AHB, PCIe/NVMe, and DDR protocols, plus mentoring abilities.