Automotive Digital Verification Engineer - SystemVerilog/UVM

BaryTech Deutschland GmbH; Hinoba-an; On-site; PHP 1,658,000 - 2,653,000; Full time

Job summary

BaryTech Deutschland GmbH in India is seeking a Senior Digital Verification Engineer to join our semiconductor verification team. You will develop verification environments for automotive microcontrollers and networking chips using SystemVerilog and UVM.

The role offers collaboration with international teams, is full-time, and requires 5+ years in semiconductor verification, with strong English communication and problem-solving skills.

Qualifications

• Bachelor’s or Master’s degree in VLSI Design, Electrical Engineering, Computer Science, or a related technical field.
• 5+ years of hands-on experience in constraint random functional and formal verification in the semiconductor industry.
• Expertise in SystemVerilog, UVM, or Specman e for hardware verification.
• Strong understanding of automotive communication protocols (Ethernet, CAN, etc.).
• Experience with regression and coverage analysis tools.
• Familiarity with Portable Stimulus language is a plus.
• Excellent problem-solving and analytical skills.
• Ability to work effectively in international and cross-functional technical teams.
• Strong English communication and documentation skills.

Responsibilities

• Develop verification concepts, strategies, and test plans for digital verification of automotive microcontrollers.
• Create verification environments using SystemVerilog and UVM for networking and communication chips.
• Execute test plans to verify the correctness and performance of designs.
• Perform test bench quality checks (code coverage, functional coverage, etc.).
• Prepare and maintain verification documentation to comply with ISO 26262 (Safety) and ISO 21434 (Security)standards.
• Collaborate cross-functionally with System/Concept Engineers, Application Engineers, Functional Safety, and Post-Silicon Teams.
• Contribute to process improvements and efficiency enhancement in verification workflows.
• Support risk management and ensure high-quality verification deliverables.

Skills

SystemVerilog

UVM

Specman e

Automotive protocols

Regression & coverage analysis

Portable Stimulus

Problem-solving

International teamwork

English communication

Education

Bachelor’s/Master’s in VLSI Design or EE/CS

Tools

Unix/Linux environments

Python scripting

Job description

BaryTech Deutschland GmbH in India is seeking a Senior Digital Verification Engineer to join our semiconductor verification team. You will develop verification environments for automotive microcontrollers and networking chips using SystemVerilog and UVM.

The role offers collaboration with international teams, is full-time, and requires 5+ years in semiconductor verification, with strong English communication and problem-solving skills.