Senior STA Engineer – Multi-Power Timing & ECOs

UST Malaysia; Penang; On-site; MYR 70,000 - 110,000; Full time

Job summary

UST Malaysia seeks an experienced Timing/STA engineer to perform SOC timing sign-off, margins calculations, and STA flow improvements. You will handle multi-power domain designs and generate timing ECOs for physical design while driving schedules and coordinating with cross-site teams.

The role requires strong analytical skills, proficiency with Synopsys/Cadence tools, and scripting in Tcl/Perl. A degree in electrical engineering is essential, with 3–10 years of relevant experience.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronic Engineering or related field.
• 3–10 years of relevant experience.
• Experience with STA and timing sign-off on SOC level.
• Strong collaboration across multi-functional teams and time zones.

Responsibilities

• Timing sign-off including timing margin calculations on SOC level.
• STA of multi-power domain designs.
• STA flow enhancement and bottleneck identification.
• Generate timing ECOs for Physical Design.
• Drive ambitious schedules and coordinate with dependent teams.

Skills

STA fundamentals

Tcl scripting

Perl scripting

Synopsys/Cadence

Analytical ability

Communication

Education

Bachelor’s or Master’s degree in Electrical/Electronic Engineering or related field

Tools

Synopsys Cadence tools

Scripting languages (Tcl/Perl)

Job description

UST Malaysia seeks an experienced Timing/STA engineer to perform SOC timing sign-off, margins calculations, and STA flow improvements. You will handle multi-power domain designs and generate timing ECOs for physical design while driving schedules and coordinating with cross-site teams.

The role requires strong analytical skills, proficiency with Synopsys/Cadence tools, and scripting in Tcl/Perl. A degree in electrical engineering is essential, with 3–10 years of relevant experience.