Senior Packaging Engineer – Advanced 2.5D/3D IC Packaging

Sandisk; Simpang Ampat; On-site; MYR 120,000 - 180,000; Full time

Job summary

Sandisk Malaysia invites experienced packaging engineers to join our advanced memory packaging team in Penang. You will drive technology development for next‑generation memory storage packaging, lead data‑driven analysis, and collaborate with global cross‑functional teams.

The role requires 5+ years in semiconductor packaging, a relevant engineering degree, and a proven track record in fab/wafer‑level packaging. AI/ML experience is a plus, and you will contribute to best‑in‑class solutions.

Qualifications

• Bachelor’s or Master’s degree in mechanical or related engineering field.
• Minimum 5 years of semiconductor packaging process experience (Fab, SMT, IC packaging).
• Experience with high-density 2.5D/3D packaging or wafer-level packaging is desirable.

Responsibilities

• Drive technology development and packaging roadmap solutions for next-gen storage packaging.
• Lead data integration and analysis of assembly/test data to improve processes.
• Coordinate cross-functional teams across design, process, and lab characterization.
• Ensure materials/design compatibility to meet stringent reliability and quality standards.
• Collaborate with suppliers and industry partners on co-development programs.
• Lead yield analysis and qualification activities in wafer-level processing.

Skills

Statistical data analysis (JMP)

Packaging technology development

Analytical problem solving

Industry 4.0 / digital manufacturing

Effective communication & teamwork

Education

Bachelor’s or Master’s degree in Mechanical, Electrical, Electronics, Microelectronics, Mechatronics, Materials Science, or related engineering

Tools

Metrology tools

FTIR/EDX analysis tools

Job description

Sandisk Malaysia invites experienced packaging engineers to join our advanced memory packaging team in Penang. You will drive technology development for next‑generation memory storage packaging, lead data‑driven analysis, and collaborate with global cross‑functional teams.

The role requires 5+ years in semiconductor packaging, a relevant engineering degree, and a proven track record in fab/wafer‑level packaging. AI/ML experience is a plus, and you will contribute to best‑in‑class solutions.