Senior NoC IP Architect & Technical Lead

Altera; George Town; On-site; MYR 240,000 - 360,000; Full time

Job summary

Altera in Penang, Malaysia seeks a senior RTL/NOC designer to develop logic and RTL for Network on Chip IPs and FPGA IPs. You will define architecture features, create prototypes, simulate models, and deliver device-level bring-up support with power and timing considerations.

The role includes mentoring junior engineers, guiding the NOC team, and proactively addressing design challenges to ensure successful project delivery.

Qualifications

• Bachelor's or Master's degree in electrical or computer engineering.
• 15+ years of related experience in RTL design and FPGA IP development.
• Expertise with SystemVerilog, simulators, lint, and synthesis tools.

Responsibilities

• Develops logic design, RTL coding, and simulations for NOC IPs and FPGA IPs.
• Defines architecture/microarchitecture features and creates prototypes and models.
• Ensures power, performance, and area goals through RTL implementation and verification.
• Reviews verification plans and guides corrective actions for RTL tests.
• Mentors team members and oversees the NOC team to ensure on-time delivery.

Skills

Leadership

Mentoring

Communication

Problem solving

Team collaboration

Education

Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering

Tools

SystemVerilog

VCS/Synopsys simulators

RTL lint

Synthesis

C/C++

Python

TCL

Unix Shell

CDC/DFT

Timing constraints verification

Job description

Altera in Penang, Malaysia seeks a senior RTL/NOC designer to develop logic and RTL for Network on Chip IPs and FPGA IPs. You will define architecture features, create prototypes, simulate models, and deliver device-level bring-up support with power and timing considerations.

The role includes mentoring junior engineers, guiding the NOC team, and proactively addressing design challenges to ensure successful project delivery.