Senior SoC RTL/Logic Engineer - Onsite in Penang

Intel Corporation; Penang; On-site; MYR 180,000 - 280,000; Full time

Job summary

Intel Corporation in Malaysia is looking for an experienced SoC RTL/Logic Staff Design Engineer to contribute to the next-generation Client SoC development. You will own IP RTL design, drive integration, and collaborate with verification teams to ensure front-end quality and readiness for downstream integration.

The role requires strong RTL/Verilog/SystemVerilog skills, experience with IP architectures, and expert problem-solving abilities to accelerate delivery while maintaining design quality.

Qualifications

• Bachelor or Master Degree in Electrical and Electronic Engineering, Computer Engineering, Computer Science, or a related discipline, with at least 3 years of experience in IP or SoC RTL/Logic Design.
• Strong knowledge of IP/subsystem architecture, I/O architecture, and industry-standard high-speed bus protocols.
• SoC/ASIC design methodology and industry-standard front-end development practices.
• RTL design using Verilog and SystemVerilog.
• Experience using AI tools to improve RTL/Logic development productivity, including design exploration, code generation, review, debug, documentation, and front-end quality checks.
• Ability to orchestrate efficient development workflows by combining domain expertise, automation, scripting, AI-assisted tools, and structured engineering practices to accelerate delivery while maintaining design quality.

Responsibilities

• Own DDG internal IP RTL design and development or integrate high-performance and high-bandwidth IP into Client SoC platforms.
• Define, implement, and deliver new IP features, change requests, and feature enhancements.
• Drive IP-to-SoC handoff quality, ensuring design completeness, compliance, and readiness for downstream integration.
• Perform logic and RTL integration into SoC, including power intent definition, signal handling across power planes and clock domains, and delivery of front-end collateral for system and software integration.
• Develop design solutions and collaborate closely with verification teams to validate functionality, features, and integration readiness.
• Execute front-end quality checks across RTL static analysis, synthesizability, timing and power convergence, netlist quality, formal equivalence verification, and related design quality milestones.
• Interpret power specifications and translate power requirements into design considerations, analysis plans, and measurable checks.
• Support power estimation, analysis, rollup, and convergence.
• Investigate power issues, identify root causes, and recommend design or flow solutions.

Skills

Verilog

SystemVerilog

RTL design

SoC integration

Debugging

Teamwork

Education

B.E./B.Tech in Electrical/Electronics Engineering

M.E./M.Tech in Electronics or Computer Engineering

Tools

Synthesis Tools

Formal Verification Tools

EDA Tools

Power Analysis Tools

Job description

Intel Corporation in Malaysia is looking for an experienced SoC RTL/Logic Staff Design Engineer to contribute to the next-generation Client SoC development. You will own IP RTL design, drive integration, and collaborate with verification teams to ensure front-end quality and readiness for downstream integration.

The role requires strong RTL/Verilog/SystemVerilog skills, experience with IP architectures, and expert problem-solving abilities to accelerate delivery while maintaining design quality.