Principal NoC IP Micro-Architect

Altera; Bayan Lepas; On-site; MYR 150,000 - 210,000; Full time

Job summary

Altera in Penang, Malaysia seeks a senior FPGA/NOC designer to lead RTL design, simulation, and verification for Network on Chip IPs and related FPGA subsystems integrated into full-chip designs.

The role involves architecture input, prototype creation, and delivering device-level models with timing and power analyses. You will mentor junior engineers, work cross-functionally, and drive excellence in RTL development.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 15+ years of related working experience.
• Experience in SystemVerilog, VCS/Synopsys simulators, Lint and Synthesis.
• Experience in FPGA design and programming is a plus.

Responsibilities

• Develops logic design, RTL coding, and simulation for Network on Chip IPs and other FPGA IPs for full-chip designs.
• Participates in architecture and microarchitecture feature definition.
• Creates prototypes, simulates models, and specifies system requirements.
• Delivers device-level models and timing/power for bring-up.
• Applies RTL implementation to meet power, performance, and area goals in collaboration with the physical team.
• Reviews verification plans and fixes RTL test failures to ensure feature correctness.
• Grooms next-level technical members and guides the NOC team, anticipating design challenges.

Skills

Leadership

Communication

Problem-solving

RTL validation

NOC IP experience

FPGA design

Education

Bachelor's or Master's in Electrical or Computer Engineering

Tools

SystemVerilog

VCS/Synopsys simulators

Lint

Synthesis

C/C++/Perl/Python/TCL/Unix Shell

Job description

Job Description

• Develops the logic design, register transfer level (RTL) coding, and simulation for Network on Chip IPs and potentially other FPGA IPs & subsystem for integration in full chip designs.
• Participates in the definition of architecture and microarchitecture features of the block being designed.
• Creates prototypes, simulates models, and specifies systems requirements.
• Prepares and designs logic diagrams and codes for implementing system design and test specifications.
• Delivers software models for device level bring up, including user visible functionality, timing, and power.
• Applies RTL implementation techniques to qualify the design to meet required power, performance, and area goals, partnering with physical implementation team.
• Strong understanding of the design methodology & advanced EDA tools (timing constraints verification, RTL lint, CDC, RDC & DFT) to ensure high quality IP development as well as deploying automation & AI to enhance development efficiency.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• As a senior designer of the team, you are also expected to groom next level technical members, technically oversee & guide the entire NOC team, proactively anticipate potential design challenges & roadblocks and take mitigation actions to ensure the successful execution of the SS that meets the requirement of the project & schedule.

Qualifications

• Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or a related field with 15+ years of related working experience.
• Experience in System Verilog, VCS/Synopsys simulators, Lint and Synthesis.
• Experience in programming with C/C++/Perl/Python/TCL/Unix Shell script.
• Experience in FPGA design and programming is a plus.
• Experience in RTL validation is a plus.
• Experience in development of Network on Chip IPs.
• Experience with the usage of AI with development process for high efficiency development would be a great plus.
• Ability to work with different teams, good communication and problem-solving skills.

Job Type

Regular

Shift

Shift 1 (Malaysia)

Primary Location

Penang 15, Penang, Malaysia

EEO Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.