Senior FPGA IP & Wireless RTL Design Engineer

754 Altera Semiconductor Technology (M) Sdn. Bhd.; George Town; On-site; MYR 60,000 - 90,000; Full time

Job summary

754 Altera Semiconductor Technology (M) Sdn. Bhd. seeks a Senior IP Design Engineer to focus on FPGA Soft IP RTL development. You will design and verify wireless IP cores, collaborating with system architects and software engineers to deliver cutting-edge wireless solutions.

The ideal candidate holds a Bachelor's degree in Electrical or Computer Engineering and possesses expertise in Verilog/System Verilog. Familiarity with FPGA design and verification tools is essential.

Qualifications

• Bachelor's degree in a relevant field.
• Proficiency in Verilog/System Verilog and RTL design coding.
• Experience in FPGA or ASIC design with a solid architecture background.
• Familiarity with simulation tools like Synopsy VCS or Questa.
• Knowledge of Ethernet and CPRI interfaces.
• Understanding of O-RAN architectures is a plus.

Responsibilities

• Design, develop, and verify wireless IP cores for FPGA platforms.
• Collaborate with system architects and software teams.
• Participate in high-speed protocol IP development.

Skills

Verilog/System Verilog and RTL design coding

FPGA design or ASIC design

Simulation and verification tools

Knowledge of high-speed serial interfaces

Understanding of timing closure and FPGA constraints

Familiarity with Python and shell scripts

Education

Bachelor's degree in Electrical, Electronics, Computer Engineering or equivalent

Job description

754 Altera Semiconductor Technology (M) Sdn. Bhd. seeks a Senior IP Design Engineer to focus on FPGA Soft IP RTL development. You will design and verify wireless IP cores, collaborating with system architects and software engineers to deliver cutting-edge wireless solutions.

The ideal candidate holds a Bachelor's degree in Electrical or Computer Engineering and possesses expertise in Verilog/System Verilog. Familiarity with FPGA design and verification tools is essential.