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XinPal Malaysia is seeking a DFT / Test Engineer in Bayan Lepas, Penang to develop and implement test strategies for SoCs and AI-SoC designs. You will drive DFT architecture, pattern development, insertion, and coverage analysis in collaboration with design, product engineering and operations teams.
With 2–4 years of experience in DFT or test development and a Bachelor's or Master's degree in Electrical or Computer Engineering, you will also apply knowledge of ATPG, MBIST, LBIST, and boundary
XinPal Malaysia is part of an MNC headquartered in Singapore, specializing in delivering innovative technology solutions and supporting cutting-edge semiconductor projects. We are committed to building a high-performing team through innovation, collaboration, and continuous growth opportunities.
We are looking for a DFT / Test Engineer in Bayan Lepas, Penang to support the development and implementation of test strategies for advanced SoC and AI-SoC designs. The role involves DFT architecture, test pattern development, test insertion, coverage analysis, and collaboration with design, product engineering, and operations teams to ensure robust and efficient semiconductor testing.
Implement DFT and test architecture for complex SoCs and advanced products across block-level, chip-level, and final test stages.
Develop and execute test patterns for logic, memory, and high-speed interconnects under the direction of senior leads.
Work with design, product engineering, and operations teams to integrate testability features early in the design cycle.
Drive implementation planning for scan, MBIST, LBIST, boundary scan, and basic interconnect test flows.
Analyze coverage, test time, and test cost trade-offs to support efficient production test execution.
Support ATE bring-up, known-good-die or die-level screening methodologies, and initial failure diagnosis.
Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering or a related field.
2-4 years of experience in DFT, product test, or test development for complex SoCs or advanced packages.
Good working knowledge of scan, ATPG, MBIST, LBIST, and boundary scan methodologies.
Exposure to modern test challenges, including multi-stage test insertion and die-level screening strategies.
Familiarity with ATE environments, yield tracking, and basic failure analysis.