CAD Flow Engineer: Physical Design Automation & QoR

UST; Penang; On-site; MYR 120,000 - 180,000; Full time

Job summary

UST in Penang, Malaysia seeks a highly motivated CAD Flow Engineer to develop, maintain, and enhance Physical Design implementation flows for advanced-node ASIC and SoC projects. The ideal candidate will have strong expertise in EDA tools, automation, methodology development, and flow optimization across RTL-to-GDSII implementation.

The role involves close collaboration with Physical Design, STA, DFT, RTL, and CAD teams to deliver robust, scalable, and efficient design methodologies that improve

Qualifications

• Bachelor's or Master's degree in Electronics, Electrical, Computer Engineering, or related discipline.
• 5-8 years of experience in VLSI CAD, Physical Design, Implementation Methodology, or Design Automation.
• Strong understanding of digital ASIC implementation flows from RTL to GDSII.
• Hands-on experience with listed EDA tools: Fusion Compiler, PrimeTime, ICC2, Formality, Design Compiler.
• Strong scripting expertise in TCL (mandatory), Python, and Shell scripting.

Responsibilities

• Develop, maintain, and support Physical Design implementation flows across advanced process nodes.
• Customize and optimize flows using Synopsys Fusion Compiler, PrimeTime, ICC2, Formality, and related tools.
• Design and maintain automation frameworks using TCL, Python, Perl, and Shell scripting.
• Create reusable infrastructure for synthesis, floorplanning, placement, CTS, routing, timing closure, and signoff activities.
• Develop QoR tracking, regression, reporting, and design health monitoring solutions.
• Debug flow issues, tool crashes, runtime bottlenecks, and methodology-related challenges.
• Collaborate with implementation teams to improve timing, power, area, congestion, and turnaround time.
• Enable new tool releases and drive tool qualification across projects.
• Develop methodologies for MCMM timing analysis, ECO flows, and signoff convergence.
• Work closely with EDA vendors to investigate tool issues and evaluate new features.
• Support deployment of advanced-node implementation methodologies (5nm, 3nm, and beyond).
• Create and maintain user documentation, flow guidelines, and training materials.

Skills

TCL

Python

Shell scripting

RTL to GDSII flow understanding

Automation frameworks

Education

Bachelor's or Master's in Electronics / Electrical / Computer Engineering

Tools

Synopsys Fusion Compiler

Synopsys PrimeTime

ICC2

Formality

Design Compiler

Job description

UST in Penang, Malaysia seeks a highly motivated CAD Flow Engineer to develop, maintain, and enhance Physical Design implementation flows for advanced-node ASIC and SoC projects. The ideal candidate will have strong expertise in EDA tools, automation, methodology development, and flow optimization across RTL-to-GDSII implementation.

The role involves close collaboration with Physical Design, STA, DFT, RTL, and CAD teams to deliver robust, scalable, and efficient design methodologies that improve