Senior Physical Design and Digital Implementation Engineer

Cadence Design Systems; Kuala Lumpur; On-site; MYR 120,000 - 180,000; Full time

Job summary

Cadence Design Systems in Malaysia seeks a Sr Application Engineer to support Cadence digital implementation, physical design, and static verification solutions locally. You will lead hands-on physical design tasks, collaborate with RTL teams, and help customers achieve optimal PPA on advanced nodes.

The role involves floorplanning, power grid design, place & route, CTS, timing closure, and stakeholder engagement with Cadence R&D; requires strong English communication and a proactive,

Qualifications

• BS/MS in EE/CS with 2+ years of hands-on experience in physical design and verification.
• Experience with 7nm and below technologies.
• Knowledge of ASIC design flow, hierarchical physical design methodologies.
• Strong knowledge of Low Power Design.
• Ability to work independently and in a team; excellent English communication.

Responsibilities

• Perform physical design implementation: floorplanning, power grid design, place and route, clock tree synthesis, timing closure.
• Tackle diverse designs, including low power and high-speed variants at latest nodes.
• Participate in or lead next-generation physical design methodology and flow development.
• Collaborate with RTL design teams to ensure successful tapeouts.

Skills

Physical design

Verification

ASIC design flow

Low power design

Timing closure

7nm technology

Education

BS/MS in EE/CS

Job description

Cadence Design Systems in Malaysia seeks a Sr Application Engineer to support Cadence digital implementation, physical design, and static verification solutions locally. You will lead hands-on physical design tasks, collaborate with RTL teams, and help customers achieve optimal PPA on advanced nodes.

The role involves floorplanning, power grid design, place & route, CTS, timing closure, and stakeholder engagement with Cadence R&D; requires strong English communication and a proactive,