Senior Memory CAD Engineer - Layout & Automation

Micron Technology, Inc; Tlaquepaque; Híbrido; MXN 900.000 - 1.300.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Medical/Dental/Vision plans

Paid time off

Paid holidays

Descripción de la vacante

Micron Technology, Inc. in Guadalajara is seeking an experienced CAD Engineer to develop and maintain CAD software for memory product design.

You will build P‑cells, utilities, and automation scripts to support layout, verification, and tapeout workflows. Ideal candidates have 5+ years in Design Automation or analog layout, strong programming skills (Python, C/C++, Java), and a solid understanding of CMOS processes.

Formación

• Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering.
• 5+ years of experience on Design Automation or analog layout.
• Experience with programming languages such as Python, C/C++, Java, Visual Basic, Perl, or Lisp.
• Experience with Unix and shell scripting.
• Understanding of PDK development, validation, and EDA tool flows.

Responsabilidades

• Develop, maintain, and support CAD software for product and process development.
• Build and validate P‑cells, utilities, and automation scripts for layout and verification tasks.
• Design and support automation for physical design, verification, optimization, and tapeout workflows.
• Collaborate with PI engineers and design teams to implement effective layout methodologies.
• Apply understanding of CMOS process fundamentals and design rules in layout work.

Conocimientos

Design Automation

Analog layout

CMOS fundamentals

Machine Learning

AI usage awareness

Educación

Bachelor’s or Master’s/PhD in Electrical/Computer Engineering

Herramientas

Unix

Shell scripting

PDK development

EDA tool flows

IC CAD tools

Descripción del empleo

Micron Technology, Inc. in Guadalajara is seeking an experienced CAD Engineer to develop and maintain CAD software for memory product design.

You will build P‑cells, utilities, and automation scripts to support layout, verification, and tapeout workflows. Ideal candidates have 5+ years in Design Automation or analog layout, strong programming skills (Python, C/C++, Java), and a solid understanding of CMOS processes.