Sr Engineer/Layout Engineer, Memory CAD, Guadalajara

Micron Technology, Inc; Tlaquepaque; Presencial; MXN 1.387.924 - 1.734.906; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Medical, dental, and vision plans

Income protection program

Paid family leave

Robust paid time-off program

Descripción de la vacante

Micron Technology, Inc is seeking a Sr Engineer/Layout Engineer to work in Guadalajara, Mexico. The ideal candidate will develop and support CAD software for product and process development, requiring over 5 years of experience in Design Automation and analog layout.

Qualified candidates will have a degree in Computer Engineering, Computer Science, or Electrical Engineering, and proficiency in using IC CAD tools. Micron offers competitive benefits including medical plans, income protection, and robust paid time-off.

Formación

• 5+ years of experience in Design Automation or analog layout.
• Experience with Unix and shell scripting.
• Understanding of PDK development and EDA tool flows.

Responsabilidades

• Develop, maintain, and support CAD software for product and process development.
• Design and support automation for physical design and verification workflows.
• Collaborate with design teams to implement effective layout methodologies.

Conocimientos

Design Automation

Analog Layout

SKILL

Python

C++

Educación

Bachelor’s or Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering

Herramientas

IC CAD tools

Unix

Descripción del empleo

JR101231Sr Engineer/Layout Engineer, Memory CAD, Guadalajara

CAD Engineer4

Relocation Level:TBD

Responsibilities

• Develop, maintain, and support CAD software for product and process development.
• Build and validate P‑cells, utilities, and automation scripts for layout and verification tasks.
• Design and support automation for physical design, verification, optimization, and tapeout workflows.
• Collaborate with PI engineers and design teams to implement effective layout methodologies.
• Apply understanding of CMOS process fundamentals and design rules in layout work.

Minimum Qualifications

• Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering.
• 5+ years of experience in Design Automation or analog layout.
• Experience with SKILL, Python, or recent proven experience with C, C++, Java, Visual Basic, Perl, or Lisp.
• Experience with Unix and shell scripting.
• Understanding of PDK development, validation, and EDA tool flows.

Preferred Qualifications

• Experience in VLSI circuit design and related software.
• Proficiency with IC CAD tools for schematics, layout, simulation, and verification.
• Knowledge of CMOS implementation trade‑offs in area, speed, and power.
• Experience with Machine Learning algorithms and applications and delivering production‑grade ML applications in IC Design.

Benefits

• Choice of medical, dental, and vision plans.
• Income protection program for illness or injury.
• Paid family leave.
• Robust paid time‑off program.
• Paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.