HBM Layout Engineer — Analog/Mixed-Signal, Guadalajara

Micron Technology, Inc.; Tlaquepaque; On-site; MXN 800,000 - 1,100,000; Full time

Job summary

Micron Technology, Inc. in Guadalajara, Mexico, is seeking a Senior Engineer HBM Layout to advance high bandwidth memory technologies. You will collaborate with international teams on analog, mixed-signal and digital block layouts and ensure timely delivery with high quality.

The role emphasizes LVS/DRC checks, area estimation, and cross-functional coordination to meet project milestones. Candidates should have 5+ years in analog/custom layout, strong Cadence and Calibre skills, and a proven

Qualifications

• 5+ years of analog/custom layout development in advanced CMOS processes.
• Proficiency with Cadence VLE/VXL and Mentor Calibre DRC/LVS essential.
• Hands-on experience drafting layouts for Temperature Sensors, PLL, ADC/DAC, LDO, Bandgap, references.
• Strong knowledge of matching, electro-migration, latch-up, crosstalk, IR-drop and parasitics.
• Understanding layout effects on speed, capacitance, power and area.
• Experience on multiple tape-outs is highly advantageous.
• Ability to plan, estimate area/time, schedule and delegate within teams.

Responsibilities

• Build analog, mixed-signal and custom digital blocks with full-chip integration.
• Perform LVS/DRC/Antenna checks and maintain documentation quality.
• Ensure timely delivery of block-level layouts with high quality.
• Lead planning, area/time estimation, scheduling and delegation to meet milestones.
• Collaborate with global teams to drive project success.
• Apply AI-enabled methodologies for automation and problem-solving.

Skills

Analog Layout

Digital Layout

Layout Verification

Cadence VLE/VXL

Calibre DRC/LVS

Planar FinFET CMOS

Temperature Sensor blocks

PLL/ADC/DAC/LDO blocks

Matching & Parasitics

Problem Solving

Education

BE or MTech in Electronic/VLSI Engineering

Tools

Cadence VLE/VXL

Mentor Calibre DRC/LVS

Job description

Micron Technology, Inc. in Guadalajara, Mexico, is seeking a Senior Engineer HBM Layout to advance high bandwidth memory technologies. You will collaborate with international teams on analog, mixed-signal and digital block layouts and ensure timely delivery with high quality.

The role emphasizes LVS/DRC checks, area estimation, and cross-functional coordination to meet project milestones. Candidates should have 5+ years in analog/custom layout, strong Cadence and Calibre skills, and a proven