CPU Pre-Silicon Verification Engineer

Intel Corporation; Región Centro; Presencial; MXN 900.000 - 1.300.000; Jornada completa

Descripción de la vacante

A leading technology company is seeking a Senior CPU Pre-Silicon Verification Engineer to ensure the functionality of CPU logic designs through advanced verification methods. This role involves leading complex verification tasks, enhancing testbench environments, and working closely with cross-functional teams. The ideal candidate should have a strong background in digital logic design and scripting languages, along with at least 5 years of relevant experience. Advanced English proficiency is required, along with the right to work in Mexico.

Formación

• 5+ years experience in digital logic design, instruction set execution, ALUs, control units, registers, and memory.
• Experience with developing UVM-based testbenches.
• Advanced level of English.
• Experience with Python, C++, SystemVerilog and at least one scripting language.

Responsabilidades

• Lead and execute pre-silicon functional verification of CPU blocks.
• Architect and enhance UVM-based verification environments.
• Debug RTL and testbench failures to uncover design bugs.
• Define functional and assertion coverage models and drive coverage closure.
• Debug RTL/testbench failures and perform root-cause analysis with several tools.

Conocimientos

Digital logic design

Analytical and debugging skills

Scripting language (Python, Perl, Tcl)

C++

SystemVerilog

English proficiency

Educación

Bachelor's degree in Electrical/Electronic Engineering or Computer Engineering

Master's degree and 3+ years experience

Herramientas

Synopsys simulators

Synopsys simulators

Descripción del empleo

# **Welcome!**## .# **Job Details:**## Job Description:This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.We are seeking a highly motivated and experienced Senior CPU Pre-Silicon Verification Engineer to join our advanced CPU verification team. In this role, you will be responsible for ensuring the functional correctness and robustness of CPU logic designs through state‑of‑the‑art pre‑silicon verification methodologies. You will work closely with microarchitecture, design, and post‑silicon teams to help deliver high‑performance, power‑efficient, and reliable CPU IP.**Key Responsibilities:*** Lead and execute pre‑silicon functional verification of complex CPU microarchitecture blocks and top‑level subsystems, ensuring correctness against architectural and microarchitectural specifications.* Develop, own, and maintain comprehensive verification and test plans, including corner cases, stress scenarios, and detailed coverage goals.* Architect, build, and enhance scalable UVM‑based (or similar) constrained‑random verification environments, including reusable testbenches, agents, sequences, checkers, and scoreboards.* Define and implement advanced functional, code, and assertion coverage models, driving systematic coverage‑driven closure.* Implement high‑quality stimulus and assertion‑based verification (SVA) to validate complex logic behaviors and corner‑case interactions.* Execute block‑level and system‑level simulations to uncover design bugs, integration issues, and functional inconsistencies.* Debug complex RTL and testbench failures, performing thorough root‑cause analysis using simulation tools, waveforms, formal methods, and collaboration with designers.* Work closely with CPU architects and RTL designers to validate intricate architectural and microarchitectural features, review specifications, identify verification risks, and propose design or methodology improvements.* Drive technical reviews and document verification strategies, methodologies, and results, ensuring alignment across architecture, design, and verification teams.* Enhance verification infrastructure and methodologies, enabling higher automation, scalability, and productivity across the team.* Mentor junior engineers and contribute to best‑practice development, methodology refinement, and tool‑flow improvements.* Support related activities, including performance modeling, formal verification, emulation, and prototyping, as needed for overall CPU validation.## **Qualifications:**Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.**Minimum Qualifications:*** Bachelor's degree or higher in Electrical/Electronic Engineering or Computer Engineering 5+ years or Master's degree with 3+ years.* Experience should be in the following areas: + Digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses. + At least one scripting language (e.g., Python, Perl, or Tcl), C++, and SystemVerilog. + Analytical and debugging skills, with a creative approach to problem-solving.* Advanced English level.* Must have unrestricted - permanent right to work in Mexico**Preferred Qualifications:*** Synopsys simulators.* Hands-on experience developing UVM-based testbenches for reusable and scalable verification environments.* Define and implement validation strategies based on architectural and design insights.## Job Type:Experienced Hire## Shift:Shift 1 (Mexico)## Primary Location:Mexico, Guadalajara## Additional Locations:## Business group:The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.## Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN/A**Work Model for this Role**This role will require an on-site presence. \* Job posting details (such as work model, location or time type) are subject to change.\*ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.