Senior HF/RF Analog Layout Architect

ams Italy S.r.l.

Romentino

In loco

EUR 90.000 - 150.000

Tempo pieno

4 giorni fa
Candidati tra i primi
Generatore di candidature

Una candidatura apposita per questo posto — un curriculum e una lettera di presentazione personalizzati, perfettamente in linea con l'annuncio.

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Descrizione del lavoro

ams OSRAM is seeking a Technical Leader for HF analog layout strategy and architecture across broadband optical communication ICs or RF ICs. You will guide parasitic-aware implementations, mentor layout engineers, and support sign-off with a focus on high-speed interfaces.

You will apply advanced CMOS node experience (FinFET/FD-SOI) and EM-aware methodologies while leading cross-team layout activities. This role requires strong leadership and hands-on expertise in RF/analog layout.

Competenze

  • BSc or MSc in Electrical Engineering (or equivalent).
  • 10+ years RF/analog layout experience.
  • HF analog layout for broadband optical communication ICs or comparable RF ICs, including high-speed receiver/transmitter interfaces.
  • Matching, shielding and isolation.
  • Advanced CMOS node experience, including FinFET and/or FD-SOI.
  • EM-aware layout methodologies.

Mansioni

  • Lead HF analog/layout strategy and architecture for broadband ICs or RF ICs.
  • Coordinate layout methodology development and enforcement.
  • Drive parasitic-aware implementations across design teams.
  • Mentor and develop layout engineers and sign-off support.
  • Provide design reviews and optimize parasitics for performance.

Conoscenze

Leadership
Mentoring
Parasitic-aware design
RF/Analog layout
Team collaboration

Formazione

BSc or MSc in Electrical Engineering

Descrizione del lavoro

ams OSRAM is seeking a Technical Leader for HF analog layout strategy and architecture across broadband optical communication ICs or RF ICs. You will guide parasitic-aware implementations, mentor layout engineers, and support sign-off with a focus on high-speed interfaces.

You will apply advanced CMOS node experience (FinFET/FD-SOI) and EM-aware methodologies while leading cross-team layout activities. This role requires strong leadership and hands-on expertise in RF/analog layout.

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