Senior Digital Design Engineer – Lead Power IC Blocks

Renesas; Sicilia; On-site; EUR 61,000 - 82,000; Full time

Benefits offered by this job

Bonus eligibility

Job summary

Renesas Electronics in Catania seeks a Senior Staff Digital Design Engineer with 8–12 years of industry experience and a BSc/MSc in EE/ECE. The role focuses on digital power management ICs, leading design blocks, debugging, verification, and automation scripting in a pre- and post-silicon environment.

Responsibilities include designing CDC/RDC/LINT-clean Verilog, SystemVerilog test benches, and mentoring junior engineers within an expert team.

Qualifications

• Requires BSc/MSc in Electrical Engineering or Computer Engineering with 8–12 years of industry experience.
• Proficient in CDC/RDC/LINT clean designs in Verilog.
• Hand-on leadership and ability to mentor junior engineers.

Responsibilities

• Develop, debug, and verify digital designs in pre and post-silicon environments.
• Write tests to verify bulk design intent per specification.
• Mentor junior engineers and lead digital design blocks in projects.

Skills

Verilog

SystemVerilog

Scripting

Leadership

Debugging

Education

BSc/MSc in EE/ECE

Tools

Cadence

Synopsys

Job description

Renesas Electronics in Catania seeks a Senior Staff Digital Design Engineer with 8–12 years of industry experience and a BSc/MSc in EE/ECE. The role focuses on digital power management ICs, leading design blocks, debugging, verification, and automation scripting in a pre- and post-silicon environment.

Responsibilities include designing CDC/RDC/LINT-clean Verilog, SystemVerilog test benches, and mentoring junior engineers within an expert team.