Senior Digital Design Engineer

Renesas; Sicilia; On-site; EUR 37,000 - 50,000; Full time

Benefits offered by this job

Bonus

Job summary

Renesas in Catania is seeking a Senior Digital Design Engineer to contribute to next-generation power management solutions for AI, Cloud and Data Center applications. You will design digital blocks in Verilog/SystemVerilog and work with cross-functional teams to deliver robust RTL.

The role offers a yearly salary range of €37,000 to €50,000 with potential bonus; based in Catania, it requires good English communication and a collaborative mindset.

Qualifications

• A degree in Electronic Engineering, Computer Engineering or a related discipline.
• Practical experience with Verilog or SystemVerilog and RTL simulation and debugging.
• A solid understanding of synchronous digital design, finite state machines, clocking and reset strategies.
• Familiarity with synthesis, timing constraints and clock domain crossing concepts.
• A collaborative approach, willingness to ask questions and motivation to learn.
• Good communication skills in English.

Responsibilities

• Design and implement digital blocks in Verilog/SystemVerilog, translating functional requirements into robust, synthesizable RTL.
• Contribute to microarchitecture definition, discussing implementation choices with experienced designers.
• Work closely with verification and analog engineers to develop and validate digital functionality.
• Perform simulations, debug design issues and support integration at subsystem and chip level.
• Run lint and clock domain crossing checks, and help resolve issues.
• Support synthesis, timing analysis and silicon validation as you develop broader experience across the design flow.

Skills

Verilog/SystemVerilog

RTL simulation

Finite state machines

Clock domain crossing

English communication

Collaboration

Education

Electronic Engineering or Computer Engineering degree

Job description

• Compensation: EUR 37,000 - EUR 50,000 - yearly

Job Description

We are looking for a Senior Digital Design Engineer to join our Renesas team in Catania, contributing to next-generation power management solutions for AI, Cloud and Data Center applications. This role is ideal for someone with proven working experience in digital IC design who enjoys hands‑on engineering, wants to take ownership of their work and is curious to explore new technical challenges.

• Design and implement digital blocks in Verilog/SystemVerilog, translating functional requirements into robust, synthesizable RTL.
• Contribute to microarchitecture definition, discussing implementation choices with experienced designers.
• Work closely with verification and analog engineers to develop and validate digital functionality.
• Perform simulations, debug design issues and support integration at subsystem and chip level.
• Run lint and clock domain crossing checks, and help resolve issues.
• Support synthesis, timing analysis and silicon validation as you develop broader experience across the design flow.

Qualifications

• A degree in Electronic Engineering, Computer Engineering or a related discipline.
• Practical experience with Verilog or SystemVerilog and RTL simulation and debugging.
• A solid understanding of synchronous digital design, finite state machines, clocking and reset strategies.
• Familiarity with synthesis, timing constraints and clock domain crossing concepts.
• A collaborative approach, willingness to ask questions and motivation to learn.
• Good communication skills in English.

Nice to have Experience in any of the following would be welcome, but is not required:

• Mixed-signal ICs or power management applications.
• Digital control algorithms or signal processing.
• Communication interfaces such as I²C, SPI or PMBus.
• Python, Tcl or other scripting languages.
• FPGA prototyping or laboratory validation.

Additional Information

You will contribute to technically challenging products in a collaborative, international environment, with support from experienced colleagues and opportunities to grow your responsibilities.

The expected annual pay range for this position is €37,000–€50,000. Please note that the final offer will depend on factors such as geographic location, relevant experience, and the candidate’s skill set. This role is also eligible for a bonus.

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .