Principal HS Digital Design Engineer (d/m/f)

ams OSRAM; Pavia; In loco; EUR 90.000 - 120.000; Tempo pieno

Descrizione del lavoro

ams OSRAM is seeking a Technical Leader to own architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products. You will define digital subsystem architectures and lead RTL integration, while driving design reviews and quality standards across verification and implementation teams.

The ideal candidate has a MSc or PhD in Electrical Engineering with 10+ years of digital IC design experience, strong Verilog/SystemVerilog skills, and knowledge

Competenze

• MSc or PhD in Electrical Engineering
• 10+ years of digital IC design experience
• Experience with high-speed interfaces (UCIe, PCIe) is a plus

Mansioni

• Define digital subsystem architectures
• Lead RTL development and integration
• Drive design reviews and quality standards
• Mentor design engineers
• Support verification and implementation teams

Conoscenze

RTL design

Verilog/SystemVerilog

High-speed digital IC design

Clock-domain crossing

Synthesis & timing analysis

Mentoring / leadership

Formazione

MSc in Electrical Engineering

PhD in Electrical Engineering

Strumenti

UCIe

PCIe

Descrizione del lavoro

• Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products
• Lead RTL development and integration
• Drive design reviews and quality standards
• Support verification and implementation teams
• MSc or PhD in Electrical Engineering
• 10+ years digital IC design experience
• High-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speed interfaces such as UCIe, PCIe or similar protocols is an advantage
• Interface protocols and clock-domain crossing
• Synthesis and timing analysis
• Advanced CMOS node experience, including FinFET and/or FD-SOI, is required

Job description

• Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products
• Define digital subsystem architectures
• Lead RTL development and integration
• Drive design reviews and quality standards
• Support verification and implementation teams
• Mentor design engineers

Profile description

• MSc or PhD in Electrical Engineering
• 10+ years digital IC design experience
• RTL design (Verilog/SystemVerilog)
• High-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speed interfaces such as UCIe, PCIe or similar protocols is an advantage
• Interface protocols and clock-domain crossing
• Synthesis and timing analysis
• Advanced CMOS node experience, including FinFET and/or FD-SOI, is required

We offer

ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

Stefanie Kleierl

[e-mail]

Find out more about us at: www.ams-osram.com