Senior Digital IC Architect & RTL Lead for SoC

Ams Osram; Italia; On-site; EUR 90,000 - 150,000; Full time

Job summary

ams OSRAM’s LSP unit seeks a Technical Leader to own architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products. You define digital subsystem architectures and lead RTL development and integration.

You will drive design reviews, support verification and implementation teams, and mentor design engineers, leveraging an MSc/PhD in Electrical Engineering and 10+ years of digital IC design experience.

Qualifications

• MSc or PhD in Electrical Engineering is required.
• 10+ years of digital IC design experience.
• RTL design using Verilog or SystemVerilog.
• Experience with high-speed interfaces such as UCIe or PCIe is an advantage.
• Knowledge of interface protocols and clock-domain crossing.
• Synthesis and timing analysis expertise.
• Advanced CMOS node experience (FinFET/FD-SOI) is required.

Responsibilities

• Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products.
• Define digital subsystem architectures.
• Lead RTL development and integration.
• Drive design reviews and quality standards.
• Support verification and implementation teams.
• Mentor design engineers.

Skills

RTL design

High-speed digital IC design

Interface protocols

Clock-domain crossing

Synthesis and timing analysis

FinFET/FD-SOI experience

Education

MSc or PhD in Electrical Engineering

Job description

ams OSRAM’s LSP unit seeks a Technical Leader to own architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products. You define digital subsystem architectures and lead RTL development and integration.

You will drive design reviews, support verification and implementation teams, and mentor design engineers, leveraging an MSc/PhD in Electrical Engineering and 10+ years of digital IC design experience.