Subsystem/SoC Level Verification Engineer

Broadcom Inc.

Bengaluru

On-site

INR 4,500,000 - 7,500,000

Full time

2 days ago
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Job summary

Broadcom Inc. in Bengaluru, India seeks an experienced Verification Engineer to drive Ethernet Subsystem/SoC verification. You will build advanced verification environments using SystemVerilog and UVM, develop BFMs, checkers, monitors and scoreboards, and create comprehensive verification plans and tests.

12-15 years in Ethernet verification is preferred. The role requires strong debugging, root cause analysis, and constrained random verification skills, with familiarity in gate-level and SDF

Qualifications

  • 12-15 years of experience in Ethernet Subsystem/SoC level functional verification
  • Experience developing verification environments using System Verilog and UVM
  • Ability to debug test failures and perform root-cause analysis

Responsibilities

  • Develop verification environments and test suites for Ethernet Subsystem/SoC
  • Create BFMs, checkers, monitors and scoreboards; drive functional coverage
  • Develop and execute block/system level verification plans and tests

Skills

SystemVerilog
UVM
BFMs/Checkers/Monitors/Scoreboards
Ethernet Subsystem/SoC verification
Debugging
Code Coverage
Constrained Random Verification
Perl
Tcl
Root Cause Analysis
Gate-level / SDF simulations
Ethernet MAC/PCS/SerDes

Education

Bachelor's/Master's in Electronics/Computer Engg

Tools

Cadence
Synopsys

Job description

## **Job Description:**He/she should have strong knowledge of the following with 12-15 years of experience in Ethernet Subsystem/SoC Level Functional verification* Working experience in Ethernet Subsystem/SoC verification* Expertise to develop verification environments using System Verilog and UVM* Expertise to develop BFMs / Checkers / monitors / Scoreboards* Must have developed block/system level verification plans and tests.* Must have capability to debug test failures to find the root cause.* Must have worked on code / functional coverage.* Experience in constrained random verification.* Domain skills: Ethernet (MAC, PCS and SerDes)/SoC verification* Gate-level /SDF simulations* Knowledge of scripting languages like Perl, Tcl* Flexible to work in any IP/Subsystem/SoC projectsCAD Tools: Cadence/SynopsysEducation Qualification: Bachelors/Master’s in Electronics/Computer Engg
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