STAFF ENGINEER , Design Verification

1840 Micron Tech. OP India LLP; Hyderabad; On-site; INR 800,000 - 1,200,000; Full time

Job summary

1840 Micron Tech. OP India LLP in Hyderabad seeks candidates for an analog timing verification role. Responsibilities include critical path verification, developing testbenches, and analyzing simulation results for timing accuracy.

The ideal candidate has a Bachelor's or Master's degree in Electrical Engineering, experience in timing analysis, and strong problem-solving skills. Familiarity with simulation tools like HSPICE and Python is preferred.

We offer a diverse and inclusive work environment.

Qualifications

• Experience in analog or mixed-signal verification, timing analysis, or circuit validation.
• Strong understanding of CMOS circuit design fundamentals and timing behavior.
• Hands-on experience with analog simulation tools.

Responsibilities

• Perform analog timing verification for critical paths using circuit-level simulations.
• Develop and maintain analog timing testbenches and simulation setups.
• Analyze waveforms and measurement results to identify timing violations.

Skills

Analog timing verification

Circuit-level simulations

Problem-solving

Effective communication

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Tools

HSPICE

PrimeSim

FineSim

SpectreFx

Python

Job description

Responsibilities and Tasks

• Perform analog timing verification for critical paths using circuit‑level and mixed‑signal simulations
• Develop and maintain analog timing testbenches, measurement environments, and simulation setups (e.g., MRUN‑based flows)
• Execute simulations across PVT corners to validate setup/hold margins, pulse widths, skew, and other critical timing metrics
• Analyze waveforms and measurement results to identify timing violations, race conditions, and marginal behavior
• Debug timing‑related failures and collaborate with Design teams to determine root cause and corrective actions
• Review design schematics, timing intent, and specifications to ensure verification coverage of critical scenarios
• Develop and maintain timing verification plans, including corner selection and coverage strategy
• Support gate‑level and netlist‑based simulations with timing and parasitics as required
• Contribute to improvement of analog timing verification methodologies, flows, and automation
• Document verification results, assumptions, and known limitations clearly for downstream teams
• Effectively and compliantly use Micron‑approved AI tools to augment verification activities, improve execution efficiency, and support continuous improvement.

Education & Experience

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
• Experience in analog or mixed‑signal verification, timing analysis, or circuit validation
• Strong understanding of CMOS circuit design fundamentals and timing behavior
• Hands‑on experience with analog simulation tools (e.g., HSPICE, PrimeSim, FineSim, SpectreFx or equivalent)
• Familiarity with digital simulation (Verilog/SystemVerilog) and mixed‑signal environments
• Ability to analyze complex waveforms and perform detailed timing debug
• Strong problem‑solving, analytical, and communication skills

Preferred Qualifications

• Experience with DRAM or high‑speed memory circuits
• Exposure to dynamic timing verification beyond STA (e.g., race conditions, analog effects, clock interactions)
• Familiarity with gate‑level simulations, parasitic effects, and initialization behavior
• Scripting or programming experience (e.g., Python) for automation and data analysis
• Experience working in cross‑functional, global teams

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.