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1840 Micron Tech. OP India LLP in Hyderabad is seeking a verification engineer to simulate and analyze pre-silicon chip designs. Responsibilities include developing test cases for DRAM and emerging memory architectures and maintaining test benches.
The ideal candidate should possess analytical capabilities for gate-level designs, a basic understanding of CMOS, and tools like SPICE and Verilog. Join a dynamic team addressing challenges in advanced memory design.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.