Sr. Staff Verification Engineer

Semtech Corporation; Hyderabad; On-site; INR 1,800,000 - 3,000,000; Full time

Job summary

Semtech Corporation is seeking a Sr. Staff Verification Engineer to lead verification plans for mixed-signal IC blocks and systems. You will work with system, digital, analog, firmware and cross-functional teams to ensure robust verification across projects.

You will define test strategies, build complex testbenches, drive coverage, and mentor junior engineers across remote sites while supporting pre/post-silicon validation and production test.

Qualifications

• BS/MS in Electrical or Computer Engineering or related field.
• Strong knowledge of digital/mixed-signal verification principles.
• Proficiency in SystemVerilog, UVM and scripting for test automation.

Responsibilities

• Define and implement verification plans for digital/mixed-signal IP blocks and ICs.
• Develop testbenches, coverage models and regression suites using SystemVerilog/UVM.
• Mentor junior engineers and coordinate with remote design sites.
• Interface with system, hardware, firmware teams and cross functional groups.
• Advise on verification best practices and tool evaluation.

Skills

SystemVerilog

UVM

Python

Debugging

RTL verification

Embedded systems

ARM

RISC-V

Education

B.S. or M.S. in Electrical or Computer Engineering

Tools

Synopsys

Cadence

Siemens

Job description

Our Team:

Semtech Corporation is a leading supplier of analog and mixed-signal semiconductors for high-end consumer, enterprise computing, communications, and industrial equipment. As our future market opportunities have increased in recent years, we have continued to invest in disruptive analog platforms and have created innovative new solutions for a wide range of leading edge products.

The Sensing Product Group has unique expertise in system level platform solutions for Sensing Products including Touch & Proximity. These are leading edge low power touch-interface solutions integrated with highly accurate ADCs for enhanced sensing performance. These ultra-small, feature-rich sensing systems are optimized for a wide range of battery-powered, portable applications such as smartphones, laptops, tablets, wearables, handheld devices and other consumer or ITA control applications.

Job Summary:

The Sr. Staff Verification Engineer is responsible for developing and implementing verification plans for a variety of mixed-signal integrated circuit blocks and systems. The Sr. Staff Verification Engineer will closely collaborate with system, digital & physical design, embedded firmware, analog, and cross functional teams.

The role also includes technical leadership, mentoring of junior verification engineers, communication and reporting to remote design sites, support to pre- and post-silicon validation, production test and application engineers.

Responsibilities:

• Define, develop and optimize comprehensive verification plans and test strategies for digital/mixed-signal IP blocks, subsystems, and full integrated circuits. Work closely with design teams to understand micro-architecture and functional specifications. Create and maintain detailed test plans, coverage models, and verification environments. Drive coverage closure including functional, code, and assertion-based coverage. Generate technical documentation and drive verification reviews. (30%)
• Design and implement complex testbenches using SystemVerilog and UVM methodology. Perform block and chip-level register-transfer level (RTL), gate-level and analog/mixed-signal (AMS) verification. Develop directed test cases, constrained-random verification environments and reusable verification components. Debug complex simulation failures and identify root causes in design or verification environments. Improve verification scalability and portability from project to project by environment enhancement and tools automation. Generate and manage continuous integration, regression testing, scoreboards, monitors, and checkers. (30%)
• Report to remote verification & design teams. Mentor junior verification engineers. (20%)
• Interface with system, digital hardware, embedded firmware, analog and cross functional teams. (10%)
• Drive adoption of advanced verification methodologies, best practices and tool evaluation. (5%)
• Technical support to silicon lab evaluation, test, product and application engineers. (5%)

Minimum Qualifications:

• 8+ years of industry experience in integrated circuit design verification (DV)
• B.S. or M.S. in Electrical or Computer Engineering
• Strong analytical, synthesis and problem solving skills
• In-depth knowledge and experience in digital IC verification for mixed-signal ICs with MCU based hardware systems (ARM, RISC-V, PIC, STM32) with memories, custom digital micro-architecture, interfaces, dedicated hardware peripherals, embedded signal processing, external IPs, and analog peripherals.
• Proficiency in SystemVerilog as High-level Verification Language and UVM implementation, Verilog/VHDL, scripting languages (Python, Perl), debugging capabilities, and industry leading EDA verification tools (Synopsys, Cadence, Siemens)
• Demonstration of technical leadership
• Experience with standard hardware protocols (I2C, I3C, SPI, MIPI)
• Independent, self-motivated, rigorous, innovating, team player and able to follow through
• Excellent verbal and written communication skills

Desired Qualifications

• Knowledge of system-level aspects: signal processing, mixed-signal, digital hardware, embedded firmware, analog, modelling, test and application
• Experience with analog block behavioral modelling with SV RNM/Verilog/VHDL
• Experience with consumer and/or ITA market circuit developments